diff options
Diffstat (limited to 'src/mainboard/google')
-rw-r--r-- | src/mainboard/google/cyan/acpi_tables.c | 3 | ||||
-rw-r--r-- | src/mainboard/google/cyan/devicetree.cb | 2 |
2 files changed, 2 insertions, 3 deletions
diff --git a/src/mainboard/google/cyan/acpi_tables.c b/src/mainboard/google/cyan/acpi_tables.c index 42380d51b3..a8e030af87 100644 --- a/src/mainboard/google/cyan/acpi_tables.c +++ b/src/mainboard/google/cyan/acpi_tables.c @@ -15,9 +15,6 @@ void mainboard_fill_gnvs(struct global_nvs *gnvs) gnvs->s5u0 = 0; gnvs->s5u1 = 0; - /* Enable DPTF */ - gnvs->dpte = 1; - /* Disable PMIC I2C port for ACPI for all boards except cyan */ struct device_nvs *dev_nvs = acpi_get_device_nvs(); if (!CONFIG(BOARD_GOOGLE_CYAN)) diff --git a/src/mainboard/google/cyan/devicetree.cb b/src/mainboard/google/cyan/devicetree.cb index cec1682ed1..c968dfc0b7 100644 --- a/src/mainboard/google/cyan/devicetree.cb +++ b/src/mainboard/google/cyan/devicetree.cb @@ -77,6 +77,8 @@ chip soc/intel/braswell # LPE audio codec settings register "lpe_codec_clk_src" = "LPE_CLK_SRC_XTAL" # 19.2MHz clock + register "dptf_enable" = "true" + # Enable LPSS and LPE devices in ACPI mode register "lpss_acpi_mode" = "1" register "emmc_acpi_mode" = "0" |