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-rw-r--r--src/mainboard/google/dedede/variants/storo/overridetree.cb8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/google/dedede/variants/storo/overridetree.cb b/src/mainboard/google/dedede/variants/storo/overridetree.cb
index 7ddadbded8..e8246522b9 100644
--- a/src/mainboard/google/dedede/variants/storo/overridetree.cb
+++ b/src/mainboard/google/dedede/variants/storo/overridetree.cb
@@ -77,16 +77,16 @@ chip soc/intel/jasperlake
.tdp_pl2_override = 20,
}"
- register "tcc_offset" = "5" # TCC of 100C
+ register "tcc_offset" = "10" # TCC of 95C
device domain 0 on
device pci 04.0 on
chip drivers/intel/dptf
## Passive Policy
register "policies.passive" = "{
- [0] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 60, 3000),
- [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 60, 3000),
- [2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_1, 60, 3000),}"
+ [0] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 67, 3000),
+ [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 67, 3000),
+ [2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_1, 67, 3000),}"
## Critical Policy
register "policies.critical" = "{
[0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),