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-rw-r--r--src/mainboard/google/hatch/variants/akemi/gpio.c4
-rw-r--r--src/mainboard/google/hatch/variants/baseboard/gpio.c8
-rw-r--r--src/mainboard/google/hatch/variants/dratini/gpio.c2
-rw-r--r--src/mainboard/google/hatch/variants/hatch/gpio.c9
-rw-r--r--src/mainboard/google/hatch/variants/helios/gpio.c2
-rw-r--r--src/mainboard/google/hatch/variants/jinlon/gpio.c6
-rw-r--r--src/mainboard/google/hatch/variants/kindred/gpio.c18
-rw-r--r--src/mainboard/google/hatch/variants/mushu/gpio.c9
-rw-r--r--src/mainboard/google/hatch/variants/stryke/gpio.c6
9 files changed, 48 insertions, 16 deletions
diff --git a/src/mainboard/google/hatch/variants/akemi/gpio.c b/src/mainboard/google/hatch/variants/akemi/gpio.c
index 41cf1410bc..0e3e46feb8 100644
--- a/src/mainboard/google/hatch/variants/akemi/gpio.c
+++ b/src/mainboard/google/hatch/variants/akemi/gpio.c
@@ -35,8 +35,6 @@ static const struct pad_config ssd_sku_gpio_table[] = {
PAD_NC(GPP_B22, NONE),
/* C11 : NC */
PAD_NC(GPP_C11, NONE),
- /* C15 : NC */
- PAD_NC(GPP_C15, NONE),
/* F1 : NC */
PAD_NC(GPP_F1, NONE),
/* F3 : MEM_STRAP_3 */
@@ -94,8 +92,6 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_B22, NONE),
/* C11 : NC */
PAD_NC(GPP_C11, NONE),
- /* C15 : NC */
- PAD_NC(GPP_C15, NONE),
/* F1 : NC */
PAD_NC(GPP_F1, NONE),
/* F3 : MEM_STRAP_3 */
diff --git a/src/mainboard/google/hatch/variants/baseboard/gpio.c b/src/mainboard/google/hatch/variants/baseboard/gpio.c
index 42e9501d01..2c3bf8d546 100644
--- a/src/mainboard/google/hatch/variants/baseboard/gpio.c
+++ b/src/mainboard/google/hatch/variants/baseboard/gpio.c
@@ -140,12 +140,8 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPI_APIC(GPP_C13, NONE, PLTRST, LEVEL, INVERT),
/* C14 : BT_DISABLE_L */
PAD_CFG_GPO(GPP_C14, 1, DEEP),
- /* C15 : WWAN_DPR_SAR_ODL
- *
- * TODO: Driver doesn't use this pin as of now. In case driver starts
- * using this pin, expose this pin to driver.
- */
- PAD_CFG_GPO(GPP_C15, 1, DEEP),
+ /* C15 : NC */
+ PAD_NC(GPP_C15, NONE),
/* C16 : PCH_I2C_TRACKPAD_SDA */
PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1),
/* C17 : PCH_I2C_TRACKPAD_SCL */
diff --git a/src/mainboard/google/hatch/variants/dratini/gpio.c b/src/mainboard/google/hatch/variants/dratini/gpio.c
index b61748b268..204715b216 100644
--- a/src/mainboard/google/hatch/variants/dratini/gpio.c
+++ b/src/mainboard/google/hatch/variants/dratini/gpio.c
@@ -29,8 +29,6 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_A19, NONE),
/* C12 : FPMCU_PCH_BOOT1 */
PAD_CFG_GPO(GPP_C12, 0, DEEP),
- /* C15 : NC */
- PAD_NC(GPP_C15, NONE),
/* F1 : NC */
PAD_NC(GPP_F1, NONE),
/* F3 : MEM_STRAP_3 */
diff --git a/src/mainboard/google/hatch/variants/hatch/gpio.c b/src/mainboard/google/hatch/variants/hatch/gpio.c
index a2adf25371..862b28fe4a 100644
--- a/src/mainboard/google/hatch/variants/hatch/gpio.c
+++ b/src/mainboard/google/hatch/variants/hatch/gpio.c
@@ -32,7 +32,14 @@ static const struct pad_config gpio_table[] = {
/* A12 : FPMCU_RST_ODL */
PAD_CFG_GPO(GPP_A12, 0, DEEP),
/* C13 : EC_PCH_INT_L */
- PAD_CFG_GPI_APIC(GPP_C13, UP_20K, PLTRST, LEVEL, INVERT)};
+ PAD_CFG_GPI_APIC(GPP_C13, UP_20K, PLTRST, LEVEL, INVERT),
+ /* C15 : WWAN_DPR_SAR_ODL
+ *
+ * TODO: Driver doesn't use this pin as of now. In case driver starts
+ * using this pin, expose this pin to driver.
+ */
+ PAD_CFG_GPO(GPP_C15, 1, DEEP),
+};
const struct pad_config *override_gpio_table(size_t *num)
{
diff --git a/src/mainboard/google/hatch/variants/helios/gpio.c b/src/mainboard/google/hatch/variants/helios/gpio.c
index 86630996e7..afe1c85160 100644
--- a/src/mainboard/google/hatch/variants/helios/gpio.c
+++ b/src/mainboard/google/hatch/variants/helios/gpio.c
@@ -43,8 +43,6 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_C6, NONE),
/* C7 : GPP_C7 ==> NC */
PAD_NC(GPP_C7, NONE),
- /* C15 : UART1_CTS# ==> NC */
- PAD_NC(GPP_C15, NONE),
/* C23 : UART2_CTS# ==> NC */
PAD_NC(GPP_C23, NONE),
/* D5 : ISH_I2C0_SDA ==> NC */
diff --git a/src/mainboard/google/hatch/variants/jinlon/gpio.c b/src/mainboard/google/hatch/variants/jinlon/gpio.c
index 3cf2c9d13e..7d2ecf279c 100644
--- a/src/mainboard/google/hatch/variants/jinlon/gpio.c
+++ b/src/mainboard/google/hatch/variants/jinlon/gpio.c
@@ -25,6 +25,12 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPO(GPP_A12, 0, DEEP),
/* C12 : FPMCU_PCH_BOOT1 */
PAD_CFG_GPO(GPP_C12, 0, DEEP),
+ /* C15 : WWAN_DPR_SAR_ODL
+ *
+ * TODO: Driver doesn't use this pin as of now. In case driver starts
+ * using this pin, expose this pin to driver.
+ */
+ PAD_CFG_GPO(GPP_C15, 1, DEEP),
/* F3 : MEM_STRAP_3 */
PAD_CFG_GPI(GPP_F3, NONE, PLTRST),
/* F10 : MEM_STRAP_2 */
diff --git a/src/mainboard/google/hatch/variants/kindred/gpio.c b/src/mainboard/google/hatch/variants/kindred/gpio.c
index 3c542437d6..19956b4f1e 100644
--- a/src/mainboard/google/hatch/variants/kindred/gpio.c
+++ b/src/mainboard/google/hatch/variants/kindred/gpio.c
@@ -31,6 +31,12 @@ static const struct pad_config ssd_sku_gpio_table[] = {
PAD_CFG_NF(GPP_A11, NONE, DEEP, NF2),
/* A12 : FPMCU_RST_ODL */
PAD_CFG_GPO(GPP_A12, 0, DEEP),
+ /* C15 : WWAN_DPR_SAR_ODL
+ *
+ * TODO: Driver doesn't use this pin as of now. In case driver starts
+ * using this pin, expose this pin to driver.
+ */
+ PAD_CFG_GPO(GPP_C15, 1, DEEP),
/* F3 : MEM_STRAP_3 */
PAD_CFG_GPI(GPP_F3, NONE, PLTRST),
/* F10 : MEM_STRAP_2 */
@@ -84,6 +90,12 @@ static const struct pad_config emmc_sku_gpio_table[] = {
PAD_NC(GPP_E4, NONE),
/* E5 : SATA_DEVSLP1 ==> NC */
PAD_NC(GPP_E5, NONE),
+ /* C15 : WWAN_DPR_SAR_ODL
+ *
+ * TODO: Driver doesn't use this pin as of now. In case driver starts
+ * using this pin, expose this pin to driver.
+ */
+ PAD_CFG_GPO(GPP_C15, 1, DEEP),
/* F3 : MEM_STRAP_3 */
PAD_CFG_GPI(GPP_F3, NONE, PLTRST),
/* F10 : MEM_STRAP_2 */
@@ -131,6 +143,12 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_A11, NONE, DEEP, NF2),
/* A12 : FPMCU_RST_ODL */
PAD_CFG_GPO(GPP_A12, 0, DEEP),
+ /* C15 : WWAN_DPR_SAR_ODL
+ *
+ * TODO: Driver doesn't use this pin as of now. In case driver starts
+ * using this pin, expose this pin to driver.
+ */
+ PAD_CFG_GPO(GPP_C15, 1, DEEP),
/* F3 : MEM_STRAP_3 */
PAD_CFG_GPI(GPP_F3, NONE, PLTRST),
/* F10 : MEM_STRAP_2 */
diff --git a/src/mainboard/google/hatch/variants/mushu/gpio.c b/src/mainboard/google/hatch/variants/mushu/gpio.c
index a2adf25371..862b28fe4a 100644
--- a/src/mainboard/google/hatch/variants/mushu/gpio.c
+++ b/src/mainboard/google/hatch/variants/mushu/gpio.c
@@ -32,7 +32,14 @@ static const struct pad_config gpio_table[] = {
/* A12 : FPMCU_RST_ODL */
PAD_CFG_GPO(GPP_A12, 0, DEEP),
/* C13 : EC_PCH_INT_L */
- PAD_CFG_GPI_APIC(GPP_C13, UP_20K, PLTRST, LEVEL, INVERT)};
+ PAD_CFG_GPI_APIC(GPP_C13, UP_20K, PLTRST, LEVEL, INVERT),
+ /* C15 : WWAN_DPR_SAR_ODL
+ *
+ * TODO: Driver doesn't use this pin as of now. In case driver starts
+ * using this pin, expose this pin to driver.
+ */
+ PAD_CFG_GPO(GPP_C15, 1, DEEP),
+};
const struct pad_config *override_gpio_table(size_t *num)
{
diff --git a/src/mainboard/google/hatch/variants/stryke/gpio.c b/src/mainboard/google/hatch/variants/stryke/gpio.c
index 4fdbe6aa39..4d0eba9ed1 100644
--- a/src/mainboard/google/hatch/variants/stryke/gpio.c
+++ b/src/mainboard/google/hatch/variants/stryke/gpio.c
@@ -33,6 +33,12 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_C11, NONE),
/* C12 : NC */
PAD_NC(GPP_C12, NONE),
+ /* C15 : WWAN_DPR_SAR_ODL
+ *
+ * TODO: Driver doesn't use this pin as of now. In case driver starts
+ * using this pin, expose this pin to driver.
+ */
+ PAD_CFG_GPO(GPP_C15, 1, DEEP),
/* F1 : NC */
PAD_NC(GPP_F1, NONE),
/* F3 : MEM_STRAP_3 */