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-rw-r--r--src/mainboard/google/sarien/variants/arcada/devicetree.cb8
-rw-r--r--src/mainboard/google/sarien/variants/sarien/devicetree.cb8
-rw-r--r--src/mainboard/google/volteer/mainboard.asl4
3 files changed, 10 insertions, 10 deletions
diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb
index c975b9906c..47709d9127 100644
--- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb
+++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb
@@ -204,11 +204,11 @@ chip soc/intel/cannonlake
register "gpio_override_pm" = "1"
# GPIO community PM configuration
- register "gpio_pm[COMM_0]" = "MISCCFG_ENABLE_GPIO_PM_CONFIG"
+ register "gpio_pm[COMM_0]" = "MISCCFG_GPIO_PM_CONFIG_BITS"
register "gpio_pm[COMM_1]" = "MISCCFG_GPSIDEDPCGEN | MISCCFG_GPRTCDLCGEN | MISCCFG_GSXSLCGEN | MISCCFG_GPDPCGEN | MISCCFG_GPDLCGEN"
- register "gpio_pm[COMM_2]" = "MISCCFG_ENABLE_GPIO_PM_CONFIG"
- register "gpio_pm[COMM_3]" = "MISCCFG_ENABLE_GPIO_PM_CONFIG"
- register "gpio_pm[COMM_4]" = "MISCCFG_ENABLE_GPIO_PM_CONFIG"
+ register "gpio_pm[COMM_2]" = "MISCCFG_GPIO_PM_CONFIG_BITS"
+ register "gpio_pm[COMM_3]" = "MISCCFG_GPIO_PM_CONFIG_BITS"
+ register "gpio_pm[COMM_4]" = "MISCCFG_GPIO_PM_CONFIG_BITS"
device cpu_cluster 0 on
device lapic 0 on end
diff --git a/src/mainboard/google/sarien/variants/sarien/devicetree.cb b/src/mainboard/google/sarien/variants/sarien/devicetree.cb
index 6a807a36b6..f035b79119 100644
--- a/src/mainboard/google/sarien/variants/sarien/devicetree.cb
+++ b/src/mainboard/google/sarien/variants/sarien/devicetree.cb
@@ -209,11 +209,11 @@ chip soc/intel/cannonlake
register "gpio_override_pm" = "1"
# GPIO community PM configuration
- register "gpio_pm[COMM_0]" = "MISCCFG_ENABLE_GPIO_PM_CONFIG"
+ register "gpio_pm[COMM_0]" = "MISCCFG_GPIO_PM_CONFIG_BITS"
register "gpio_pm[COMM_1]" = "MISCCFG_GPSIDEDPCGEN | MISCCFG_GPRTCDLCGEN | MISCCFG_GSXSLCGEN | MISCCFG_GPDPCGEN | MISCCFG_GPDLCGEN"
- register "gpio_pm[COMM_2]" = "MISCCFG_ENABLE_GPIO_PM_CONFIG"
- register "gpio_pm[COMM_3]" = "MISCCFG_ENABLE_GPIO_PM_CONFIG"
- register "gpio_pm[COMM_4]" = "MISCCFG_ENABLE_GPIO_PM_CONFIG"
+ register "gpio_pm[COMM_2]" = "MISCCFG_GPIO_PM_CONFIG_BITS"
+ register "gpio_pm[COMM_3]" = "MISCCFG_GPIO_PM_CONFIG_BITS"
+ register "gpio_pm[COMM_4]" = "MISCCFG_GPIO_PM_CONFIG_BITS"
device cpu_cluster 0 on
device lapic 0 on end
diff --git a/src/mainboard/google/volteer/mainboard.asl b/src/mainboard/google/volteer/mainboard.asl
index 0e9bb8c1c8..5242845511 100644
--- a/src/mainboard/google/volteer/mainboard.asl
+++ b/src/mainboard/google/volteer/mainboard.asl
@@ -16,7 +16,7 @@ Method (PGPM, 1, Serialized)
*/
Method (MPTS, 1, Serialized)
{
- PGPM (MISCCFG_ENABLE_GPIO_PM_CONFIG)
+ PGPM (MISCCFG_GPIO_PM_CONFIG_BITS)
}
/*
@@ -36,7 +36,7 @@ Method (MS0X, 1, Serialized)
{
If (Arg0 == 1) {
/* S0ix Entry */
- PGPM (MISCCFG_ENABLE_GPIO_PM_CONFIG)
+ PGPM (MISCCFG_GPIO_PM_CONFIG_BITS)
} Else {
/* S0ix Exit */
PGPM (0)