3 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/google/jecht/chromeos.c b/src/mainboard/google/jecht/chromeos.c
index 5f897f32fc..f99fd6d438 100644
--- a/src/mainboard/google/jecht/chromeos.c
+++ b/src/mainboard/google/jecht/chromeos.c
@@ -22,6 +22,7 @@
 #include <ec/google/chromeec/ec.h>
 #include <soc/gpio.h>
 #include <soc/sata.h>
+#include "onboard.h"
 
 #define GPIO_SPI_WP	58
 #define GPIO_REC_MODE	12
diff --git a/src/mainboard/google/jecht/onboard.h b/src/mainboard/google/jecht/onboard.h
index 96c792c58a..a911fe60b8 100644
--- a/src/mainboard/google/jecht/onboard.h
+++ b/src/mainboard/google/jecht/onboard.h
@@ -19,6 +19,8 @@
 #ifndef __ACPI__
 void lan_init(void);
 
+void save_chromeos_gpios(void);
+
 void set_power_led(int state);
 
 enum {
diff --git a/src/mainboard/google/jecht/romstage.c b/src/mainboard/google/jecht/romstage.c
index a71d3fe53c..6203a1e457 100644
--- a/src/mainboard/google/jecht/romstage.c
+++ b/src/mainboard/google/jecht/romstage.c
@@ -46,6 +46,9 @@ void mainboard_romstage_entry(struct romstage_params *rp)
 
 	/* Call into the real romstage main with this board's attributes. */
 	romstage_common(rp);
+
+	if (IS_ENABLED(CONFIG_CHROMEOS))
+		save_chromeos_gpios();
 }
 
 void mainboard_pre_console_init(void)