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-rw-r--r--src/mainboard/google/sarien/variants/arcada/devicetree.cb1
-rw-r--r--src/mainboard/google/sarien/variants/sarien/devicetree.cb1
2 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb
index 4efaf55191..a47a53d4e0 100644
--- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb
+++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb
@@ -100,6 +100,7 @@ chip soc/intel/cannonlake
# PCIe port 11 for card reader
register "PcieRpEnable[10]" = "1"
+ register "PcieRpLtrEnable[10]" = "1"
register "PcieClkSrcUsage[1]" = "10"
register "PcieClkSrcClkReq[1]" = "1"
diff --git a/src/mainboard/google/sarien/variants/sarien/devicetree.cb b/src/mainboard/google/sarien/variants/sarien/devicetree.cb
index 85d4f9def9..d3d26f9800 100644
--- a/src/mainboard/google/sarien/variants/sarien/devicetree.cb
+++ b/src/mainboard/google/sarien/variants/sarien/devicetree.cb
@@ -99,6 +99,7 @@ chip soc/intel/cannonlake
# PCIe port 8 for Card Reader
register "PcieRpEnable[7]" = "1"
+ register "PcieRpLtrEnable[7]" = "1"
register "PcieClkSrcUsage[4]" = "7"
register "PcieClkSrcClkReq[4]" = "4"