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-rw-r--r--src/mainboard/google/gru/mainboard.c40
1 files changed, 29 insertions, 11 deletions
diff --git a/src/mainboard/google/gru/mainboard.c b/src/mainboard/google/gru/mainboard.c
index d34a9f730a..7e360e7880 100644
--- a/src/mainboard/google/gru/mainboard.c
+++ b/src/mainboard/google/gru/mainboard.c
@@ -235,18 +235,36 @@ static void setup_usb(void)
/* A few magic PHY tuning values that improve eye diagram amplitude
* and make it extra sure we get reliable communication in firmware. */
/* Set max ODT compensation voltage and current tuning reference. */
- write32(&rk3399_grf->usbphy0_ctrl[3], 0x0fff02e3);
- write32(&rk3399_grf->usbphy1_ctrl[3], 0x0fff02e3);
- /* Set max pre-emphasis level, only on Kevin PHY0 and PHY1,
- * and disable the pre-emphasize in eop state to avoid
- * mis-trigger the disconnect detection. */
+ write32(&rk3399_grf->usbphy0_ctrl[3], RK_CLRSETBITS(0xfff, 0x2e3));
+ write32(&rk3399_grf->usbphy1_ctrl[3], RK_CLRSETBITS(0xfff, 0x2e3));
+
if (IS_ENABLED(CONFIG_BOARD_GOOGLE_KEVIN)) {
- write32(&rk3399_grf->usbphy0_ctrl[12], 0xffff00a7);
- write32(&rk3399_grf->usbphy1_ctrl[12], 0xffff00a7);
- write32(&rk3399_grf->usbphy0_ctrl[0], 0x00010000);
- write32(&rk3399_grf->usbphy1_ctrl[0], 0x00010000);
- write32(&rk3399_grf->usbphy0_ctrl[13], 0x00010000);
- write32(&rk3399_grf->usbphy1_ctrl[13], 0x00010000);
+ /* Set max pre-emphasis level, only on Kevin PHY0 and PHY1 */
+ write32(&rk3399_grf->usbphy0_ctrl[12],
+ RK_CLRSETBITS(0xffff, 0xa7));
+ write32(&rk3399_grf->usbphy1_ctrl[12],
+ RK_CLRSETBITS(0xffff, 0xa7));
+
+ /* Disable the pre-emphasize in eop state and chirp
+ * state to avoid mis-trigger the disconnect detection
+ * and also avoid high-speed handshake fail */
+ write32(&rk3399_grf->usbphy0_ctrl[0], RK_CLRBITS(0x3));
+ write32(&rk3399_grf->usbphy1_ctrl[0], RK_CLRBITS(0x3));
+ write32(&rk3399_grf->usbphy0_ctrl[13], RK_CLRBITS(0x3));
+ write32(&rk3399_grf->usbphy1_ctrl[13], RK_CLRBITS(0x3));
+
+ /* ODT auto compensation bypass, set max driver strength */
+ write32(&rk3399_grf->usbphy0_ctrl[2],
+ RK_CLRSETBITS(0x7e << 4, 0x60 << 4));
+ write32(&rk3399_grf->usbphy1_ctrl[2],
+ RK_CLRSETBITS(0x7e << 4, 0x60 << 4));
+
+ /* ODT auto refresh bypass, and set the max
+ * bias current tuning reference */
+ write32(&rk3399_grf->usbphy0_ctrl[3],
+ RK_CLRSETBITS(0x21c, 1 << 4));
+ write32(&rk3399_grf->usbphy1_ctrl[3],
+ RK_CLRSETBITS(0x21c, 1 << 4));
}
setup_usb_otg0();