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-rw-r--r--src/mainboard/google/butterfly/devicetree.cb6
-rw-r--r--src/mainboard/google/link/devicetree.cb6
-rw-r--r--src/mainboard/google/parrot/devicetree.cb6
-rw-r--r--src/mainboard/google/stout/devicetree.cb6
4 files changed, 12 insertions, 12 deletions
diff --git a/src/mainboard/google/butterfly/devicetree.cb b/src/mainboard/google/butterfly/devicetree.cb
index 095656b158..2b9753a361 100644
--- a/src/mainboard/google/butterfly/devicetree.cb
+++ b/src/mainboard/google/butterfly/devicetree.cb
@@ -26,9 +26,9 @@ chip northbridge/intel/sandybridge
device lapic 0x0 on end
device lapic 0xacac off end
- register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1)
- register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3)
- register "c3_acpower" = "5" # ACPI(C3) = MWAIT(C7)
+ register "acpi_c1" = "1" # ACPI(C1) = MWAIT(C1)
+ register "acpi_c2" = "3" # ACPI(C2) = MWAIT(C3)
+ register "acpi_c3" = "5" # ACPI(C3) = MWAIT(C7)
end
end
diff --git a/src/mainboard/google/link/devicetree.cb b/src/mainboard/google/link/devicetree.cb
index 5241dd650a..a99d618eb8 100644
--- a/src/mainboard/google/link/devicetree.cb
+++ b/src/mainboard/google/link/devicetree.cb
@@ -25,9 +25,9 @@ chip northbridge/intel/sandybridge
device lapic 0x0 on end
device lapic 0xacac off end
- register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1)
- register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3)
- register "c3_acpower" = "5" # ACPI(C3) = MWAIT(C7)
+ register "acpi_c1" = "1" # ACPI(C1) = MWAIT(C1)
+ register "acpi_c2" = "3" # ACPI(C2) = MWAIT(C3)
+ register "acpi_c3" = "5" # ACPI(C3) = MWAIT(C7)
end
end
diff --git a/src/mainboard/google/parrot/devicetree.cb b/src/mainboard/google/parrot/devicetree.cb
index 2dc35e8a30..a384d87387 100644
--- a/src/mainboard/google/parrot/devicetree.cb
+++ b/src/mainboard/google/parrot/devicetree.cb
@@ -25,9 +25,9 @@ chip northbridge/intel/sandybridge
device lapic 0x0 on end
device lapic 0xacac off end
- register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1)
- register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3)
- register "c3_acpower" = "5" # ACPI(C3) = MWAIT(C7)
+ register "acpi_c1" = "1" # ACPI(C1) = MWAIT(C1)
+ register "acpi_c2" = "3" # ACPI(C2) = MWAIT(C3)
+ register "acpi_c3" = "5" # ACPI(C3) = MWAIT(C7)
end
end
diff --git a/src/mainboard/google/stout/devicetree.cb b/src/mainboard/google/stout/devicetree.cb
index 66dd06de91..5461b15dd9 100644
--- a/src/mainboard/google/stout/devicetree.cb
+++ b/src/mainboard/google/stout/devicetree.cb
@@ -27,9 +27,9 @@ chip northbridge/intel/sandybridge
register "tcc_offset" = "5" # TCC of 95C
- register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1)
- register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3)
- register "c3_acpower" = "5" # ACPI(C3) = MWAIT(C7)
+ register "acpi_c1" = "1" # ACPI(C1) = MWAIT(C1)
+ register "acpi_c2" = "3" # ACPI(C2) = MWAIT(C3)
+ register "acpi_c3" = "5" # ACPI(C3) = MWAIT(C7)
end
end