diff options
Diffstat (limited to 'src/mainboard/google')
7 files changed, 9 insertions, 14 deletions
diff --git a/src/mainboard/google/volteer/variants/eldrid/overridetree.cb b/src/mainboard/google/volteer/variants/eldrid/overridetree.cb index ed15755953..f64370af57 100644 --- a/src/mainboard/google/volteer/variants/eldrid/overridetree.cb +++ b/src/mainboard/google/volteer/variants/eldrid/overridetree.cb @@ -15,8 +15,8 @@ chip soc/intel/tigerlake register "TcssAuxOri" = "1" register "DdiPort1Hpd" = "0" register "DdiPort2Hpd" = "0" - register "IomTypeCPortPadCfg[0]" = "0x090E000A" - register "IomTypeCPortPadCfg[1]" = "0x090E000D" + register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E10, .pad_auxn_dc = GPP_E13}" + #+-------------------+---------------------------+ #| Field | Value | #+-------------------+---------------------------+ diff --git a/src/mainboard/google/volteer/variants/elemi/overridetree.cb b/src/mainboard/google/volteer/variants/elemi/overridetree.cb index 5aba269e56..ae73246bd6 100644 --- a/src/mainboard/google/volteer/variants/elemi/overridetree.cb +++ b/src/mainboard/google/volteer/variants/elemi/overridetree.cb @@ -3,8 +3,7 @@ chip soc/intel/tigerlake register "TcssAuxOri" = "1" register "DdiPort1Hpd" = "0" register "DdiPort2Hpd" = "0" - register "IomTypeCPortPadCfg[0]" = "0x090E000A" - register "IomTypeCPortPadCfg[1]" = "0x090E000D" + register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E10, .pad_auxn_dc = GPP_E13}" # Enable EMMC PCIE 5 using clk 5 register "PcieRpEnable[4]" = "1" diff --git a/src/mainboard/google/volteer/variants/lindar/overridetree.cb b/src/mainboard/google/volteer/variants/lindar/overridetree.cb index 5edd6db89c..8274531a8e 100644 --- a/src/mainboard/google/volteer/variants/lindar/overridetree.cb +++ b/src/mainboard/google/volteer/variants/lindar/overridetree.cb @@ -2,8 +2,8 @@ chip soc/intel/tigerlake register "DdiPort1Hpd" = "0" register "DdiPort2Hpd" = "0" register "TcssAuxOri" = "1" - register "IomTypeCPortPadCfg[0]" = "0x090E000A" - register "IomTypeCPortPadCfg[1]" = "0x090E000D" + register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E10, .pad_auxn_dc = GPP_E13}" + # USB Port Config register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port A0 register "usb2_ports[3]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-A / Type-C C1 diff --git a/src/mainboard/google/volteer/variants/malefor/overridetree.cb b/src/mainboard/google/volteer/variants/malefor/overridetree.cb index 00d609f702..0d25df89fd 100644 --- a/src/mainboard/google/volteer/variants/malefor/overridetree.cb +++ b/src/mainboard/google/volteer/variants/malefor/overridetree.cb @@ -12,8 +12,7 @@ chip soc/intel/tigerlake register "SaGv" = "SaGv_Disabled" register "TcssAuxOri" = "1" - register "IomTypeCPortPadCfg[0]" = "0x090E000A" - register "IomTypeCPortPadCfg[1]" = "0x090E000D" + register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E10, .pad_auxn_dc = GPP_E13}" # I2C Port Config register "SerialIoI2cMode" = "{ diff --git a/src/mainboard/google/volteer/variants/voema/overridetree.cb b/src/mainboard/google/volteer/variants/voema/overridetree.cb index 86b71ee9a4..32f1a53ac4 100644 --- a/src/mainboard/google/volteer/variants/voema/overridetree.cb +++ b/src/mainboard/google/volteer/variants/voema/overridetree.cb @@ -9,8 +9,7 @@ chip soc/intel/tigerlake register "usb2_ports[4]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-A / Type-C Port 0 register "TcssAuxOri" = "1" - register "IomTypeCPortPadCfg[0]" = "0x090E000A" - register "IomTypeCPortPadCfg[1]" = "0x090E000D" + register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E10, .pad_auxn_dc = GPP_E13}" # Disable WLAN PCIE 7 register "PcieRpEnable[6]" = "0" diff --git a/src/mainboard/google/volteer/variants/volteer/overridetree.cb b/src/mainboard/google/volteer/variants/volteer/overridetree.cb index bce953b8cd..786ac02bde 100644 --- a/src/mainboard/google/volteer/variants/volteer/overridetree.cb +++ b/src/mainboard/google/volteer/variants/volteer/overridetree.cb @@ -44,8 +44,7 @@ chip soc/intel/tigerlake }, }" register "TcssAuxOri" = "1" - register "IomTypeCPortPadCfg[0]" = "0x090E000A" - register "IomTypeCPortPadCfg[1]" = "0x090E000D" + register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E10, .pad_auxn_dc = GPP_E13}" register "HybridStorageMode" = "1" diff --git a/src/mainboard/google/volteer/variants/volteer2/overridetree.cb b/src/mainboard/google/volteer/variants/volteer2/overridetree.cb index 635a310ea8..4e8302a363 100644 --- a/src/mainboard/google/volteer/variants/volteer2/overridetree.cb +++ b/src/mainboard/google/volteer/variants/volteer2/overridetree.cb @@ -1,7 +1,6 @@ chip soc/intel/tigerlake register "TcssAuxOri" = "1" - register "IomTypeCPortPadCfg[0]" = "0x090E000A" - register "IomTypeCPortPadCfg[1]" = "0x090E000D" + register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E10, .pad_auxn_dc = GPP_E13}" register "DdiPort1Hpd" = "0" register "DdiPort2Hpd" = "0" #+-------------------+---------------------------+ |