diff options
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/chell/Makefile.inc | 6 | ||||
| -rw-r--r-- | src/mainboard/google/chell/bootblock_mainboard.c (renamed from src/mainboard/google/chell/car.c) | 6 | ||||
| -rw-r--r-- | src/mainboard/google/glados/Makefile.inc | 6 | ||||
| -rw-r--r-- | src/mainboard/google/glados/bootblock_mainboard.c (renamed from src/mainboard/google/glados/car.c) | 6 | ||||
| -rw-r--r-- | src/mainboard/google/lars/Makefile.inc | 6 | ||||
| -rw-r--r-- | src/mainboard/google/lars/bootblock_mainboard.c (renamed from src/mainboard/google/lars/car.c) | 6 |
6 files changed, 18 insertions, 18 deletions
diff --git a/src/mainboard/google/chell/Makefile.inc b/src/mainboard/google/chell/Makefile.inc index c0ca567339..e52eb7edac 100644 --- a/src/mainboard/google/chell/Makefile.inc +++ b/src/mainboard/google/chell/Makefile.inc @@ -15,10 +15,12 @@ subdirs-y += spd +bootblock-y += bootblock_mainboard.c + romstage-y += boardid.c -romstage-y += car.c romstage-y += pei_data.c +bootblock-$(CONFIG_CHROMEOS) += chromeos.c verstage-$(CONFIG_CHROMEOS) += chromeos.c romstage-$(CONFIG_CHROMEOS) += chromeos.c ramstage-$(CONFIG_CHROMEOS) += chromeos.c @@ -31,5 +33,3 @@ ramstage-y += pei_data.c ramstage-y += ramstage.c smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c - -verstage-y += car.c diff --git a/src/mainboard/google/chell/car.c b/src/mainboard/google/chell/bootblock_mainboard.c index 7791b92980..d514622442 100644 --- a/src/mainboard/google/chell/car.c +++ b/src/mainboard/google/chell/bootblock_mainboard.c @@ -13,20 +13,20 @@ * GNU General Public License for more details. */ +#include <bootblock_common.h> #include <ec/google/chromeec/ec.h> -#include <fsp/car.h> #include <soc/gpio.h> #include "gpio.h" static void early_config_gpio(void) { /* This is a hack for FSP because it does things in MemoryInit() - * which it shouldn't be. We have to prepare certain gpios here + * which it shouldn't do. We have to prepare certain gpios here * because of the brokenness in FSP. */ gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table)); } -void car_mainboard_post_console_init(void) +void bootblock_mainboard_init(void) { /* Ensure the EC and PD are in the right mode for recovery */ google_chromeec_early_init(); diff --git a/src/mainboard/google/glados/Makefile.inc b/src/mainboard/google/glados/Makefile.inc index c0ca567339..e52eb7edac 100644 --- a/src/mainboard/google/glados/Makefile.inc +++ b/src/mainboard/google/glados/Makefile.inc @@ -15,10 +15,12 @@ subdirs-y += spd +bootblock-y += bootblock_mainboard.c + romstage-y += boardid.c -romstage-y += car.c romstage-y += pei_data.c +bootblock-$(CONFIG_CHROMEOS) += chromeos.c verstage-$(CONFIG_CHROMEOS) += chromeos.c romstage-$(CONFIG_CHROMEOS) += chromeos.c ramstage-$(CONFIG_CHROMEOS) += chromeos.c @@ -31,5 +33,3 @@ ramstage-y += pei_data.c ramstage-y += ramstage.c smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c - -verstage-y += car.c diff --git a/src/mainboard/google/glados/car.c b/src/mainboard/google/glados/bootblock_mainboard.c index 7791b92980..d514622442 100644 --- a/src/mainboard/google/glados/car.c +++ b/src/mainboard/google/glados/bootblock_mainboard.c @@ -13,20 +13,20 @@ * GNU General Public License for more details. */ +#include <bootblock_common.h> #include <ec/google/chromeec/ec.h> -#include <fsp/car.h> #include <soc/gpio.h> #include "gpio.h" static void early_config_gpio(void) { /* This is a hack for FSP because it does things in MemoryInit() - * which it shouldn't be. We have to prepare certain gpios here + * which it shouldn't do. We have to prepare certain gpios here * because of the brokenness in FSP. */ gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table)); } -void car_mainboard_post_console_init(void) +void bootblock_mainboard_init(void) { /* Ensure the EC and PD are in the right mode for recovery */ google_chromeec_early_init(); diff --git a/src/mainboard/google/lars/Makefile.inc b/src/mainboard/google/lars/Makefile.inc index 4bf6e0ab41..cafa12ca60 100644 --- a/src/mainboard/google/lars/Makefile.inc +++ b/src/mainboard/google/lars/Makefile.inc @@ -16,10 +16,12 @@ subdirs-y += spd +bootblock-y += bootblock_mainboard.c + romstage-y += boardid.c -romstage-y += car.c romstage-y += pei_data.c +bootblock-$(CONFIG_CHROMEOS) += chromeos.c verstage-$(CONFIG_CHROMEOS) += chromeos.c romstage-$(CONFIG_CHROMEOS) += chromeos.c ramstage-$(CONFIG_CHROMEOS) += chromeos.c @@ -32,5 +34,3 @@ ramstage-y += pei_data.c ramstage-y += ramstage.c smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c - -verstage-y += car.c diff --git a/src/mainboard/google/lars/car.c b/src/mainboard/google/lars/bootblock_mainboard.c index 7791b92980..d514622442 100644 --- a/src/mainboard/google/lars/car.c +++ b/src/mainboard/google/lars/bootblock_mainboard.c @@ -13,20 +13,20 @@ * GNU General Public License for more details. */ +#include <bootblock_common.h> #include <ec/google/chromeec/ec.h> -#include <fsp/car.h> #include <soc/gpio.h> #include "gpio.h" static void early_config_gpio(void) { /* This is a hack for FSP because it does things in MemoryInit() - * which it shouldn't be. We have to prepare certain gpios here + * which it shouldn't do. We have to prepare certain gpios here * because of the brokenness in FSP. */ gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table)); } -void car_mainboard_post_console_init(void) +void bootblock_mainboard_init(void) { /* Ensure the EC and PD are in the right mode for recovery */ google_chromeec_early_init(); |