aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/google
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/dragonegg/dsdt.asl2
-rw-r--r--src/mainboard/google/drallion/dsdt.asl2
-rw-r--r--src/mainboard/google/hatch/dsdt.asl2
-rw-r--r--src/mainboard/google/sarien/dsdt.asl2
4 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/google/dragonegg/dsdt.asl b/src/mainboard/google/dragonegg/dsdt.asl
index 24814da9f8..f84b0b5a60 100644
--- a/src/mainboard/google/dragonegg/dsdt.asl
+++ b/src/mainboard/google/dragonegg/dsdt.asl
@@ -37,7 +37,7 @@ DefinitionBlock(
Scope (\_SB) {
Device (PCI0)
{
- #include <soc/intel/icelake/acpi/northbridge.asl>
+ #include <soc/intel/common/block/acpi/acpi/northbridge.asl>
#include <soc/intel/icelake/acpi/southbridge.asl>
}
}
diff --git a/src/mainboard/google/drallion/dsdt.asl b/src/mainboard/google/drallion/dsdt.asl
index 78c6c16a33..ee63d6ee8a 100644
--- a/src/mainboard/google/drallion/dsdt.asl
+++ b/src/mainboard/google/drallion/dsdt.asl
@@ -36,7 +36,7 @@ DefinitionBlock(
Scope (\_SB) {
Device (PCI0)
{
- #include <soc/intel/cannonlake/acpi/northbridge.asl>
+ #include <soc/intel/common/block/acpi/acpi/northbridge.asl>
#include <soc/intel/cannonlake/acpi/southbridge.asl>
}
/* Per board variant mainboard hooks. */
diff --git a/src/mainboard/google/hatch/dsdt.asl b/src/mainboard/google/hatch/dsdt.asl
index 1a0ff68212..16a8a661b7 100644
--- a/src/mainboard/google/hatch/dsdt.asl
+++ b/src/mainboard/google/hatch/dsdt.asl
@@ -37,7 +37,7 @@ DefinitionBlock(
Scope (\_SB) {
Device (PCI0)
{
- #include <soc/intel/cannonlake/acpi/northbridge.asl>
+ #include <soc/intel/common/block/acpi/acpi/northbridge.asl>
#include <soc/intel/cannonlake/acpi/southbridge.asl>
}
}
diff --git a/src/mainboard/google/sarien/dsdt.asl b/src/mainboard/google/sarien/dsdt.asl
index a809b75e01..c32470eb1b 100644
--- a/src/mainboard/google/sarien/dsdt.asl
+++ b/src/mainboard/google/sarien/dsdt.asl
@@ -36,7 +36,7 @@ DefinitionBlock(
Scope (\_SB) {
Device (PCI0)
{
- #include <soc/intel/cannonlake/acpi/northbridge.asl>
+ #include <soc/intel/common/block/acpi/acpi/northbridge.asl>
#include <soc/intel/cannonlake/acpi/southbridge.asl>
}
/* Per board variant mainboard hooks. */