summaryrefslogtreecommitdiff
path: root/src/mainboard/google
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/zoombini/variants/meowth/devicetree.cb7
1 files changed, 5 insertions, 2 deletions
diff --git a/src/mainboard/google/zoombini/variants/meowth/devicetree.cb b/src/mainboard/google/zoombini/variants/meowth/devicetree.cb
index 062c6ecb78..4076ea6035 100644
--- a/src/mainboard/google/zoombini/variants/meowth/devicetree.cb
+++ b/src/mainboard/google/zoombini/variants/meowth/devicetree.cb
@@ -6,8 +6,8 @@ chip soc/intel/cannonlake
register "deep_s5_enable_ac" = "1"
register "deep_s5_enable_dc" = "1"
- # Debug Option, set to DBC over USB 3.0 port only
- register "DebugConsent" = "DebugConsent_USB3_DBC"
+ # Debug Option
+ register "DebugConsent" = "DebugConsent_Disabled"
# GPE configuration
# Note that GPE events called out in ASL code rely on this
@@ -75,6 +75,9 @@ chip soc/intel/cannonlake
register "PcieClkSrcUsage[3]" = "8"
register "PcieClkSrcClkReq[3]" = "3"
+ # Enable S0ix
+ register "s0ix_enable" = "1"
+
device domain 0 on
device pci 00.0 on end # Host Bridge
device pci 02.0 on end # Integrated Graphics Device