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-rw-r--r--src/mainboard/google/zork/Makefile.inc2
-rw-r--r--src/mainboard/google/zork/romstage.c5
2 files changed, 0 insertions, 7 deletions
diff --git a/src/mainboard/google/zork/Makefile.inc b/src/mainboard/google/zork/Makefile.inc
index ac828e2765..88aef867de 100644
--- a/src/mainboard/google/zork/Makefile.inc
+++ b/src/mainboard/google/zork/Makefile.inc
@@ -3,7 +3,6 @@
bootblock-y += bootblock.c
romstage-y += chromeos.c
-romstage-y += ec.c
romstage-y += sku_id.c
ramstage-y += chromeos.c
@@ -14,7 +13,6 @@ ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y)
verstage-y += verstage.c
else
verstage-y += chromeos.c
-verstage-y += ec.c
endif
smm-y += smihandler.c
diff --git a/src/mainboard/google/zork/romstage.c b/src/mainboard/google/zork/romstage.c
index 3da8a53cd8..bd4c96eebe 100644
--- a/src/mainboard/google/zork/romstage.c
+++ b/src/mainboard/google/zork/romstage.c
@@ -1,11 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <baseboard/variants.h>
-#include <ec/ec.h>
-#include <ec/google/chromeec/ec.h>
#include <soc/gpio.h>
#include <soc/romstage.h>
-#include <variant/ec.h>
#include <console/console.h>
void mainboard_romstage_entry_s3(int s3_resume)
@@ -16,6 +13,4 @@ void mainboard_romstage_entry_s3(int s3_resume)
gpios = variant_romstage_gpio_table(&num_gpios);
program_gpios(gpios, num_gpios);
variant_pcie_power_reset_configure();
-
- mainboard_ec_init();
}