diff options
Diffstat (limited to 'src/mainboard/google/zork/variants/morphius')
12 files changed, 230 insertions, 0 deletions
diff --git a/src/mainboard/google/zork/variants/morphius/Makefile.inc b/src/mainboard/google/zork/variants/morphius/Makefile.inc new file mode 100644 index 0000000000..b1212bcbdd --- /dev/null +++ b/src/mainboard/google/zork/variants/morphius/Makefile.inc @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +subdirs-y += ./spd + +romstage-y += ./romstage.c + +ramstage-y += gpio.c diff --git a/src/mainboard/google/zork/variants/morphius/gpio.c b/src/mainboard/google/zork/variants/morphius/gpio.c new file mode 100644 index 0000000000..ff8fa202fc --- /dev/null +++ b/src/mainboard/google/zork/variants/morphius/gpio.c @@ -0,0 +1,48 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/gpio.h> +#include <baseboard/variants.h> +#include <boardid.h> +#include <gpio.h> +#include <soc/gpio.h> +#include <ec/google/chromeec/ec.h> + +static const struct soc_amd_gpio morphius_v1_gpio_set_stage_ram[] = { + /* USB_OC4_L - USB_A1 */ + PAD_NF(GPIO_14, USB_OC4_L, PULL_UP), + /* USB_OC2_L - USB A0 */ + PAD_NF(GPIO_18, USB_OC2_L, PULL_UP), + /* DMIC_AD_EN */ + PAD_GPO(GPIO_84, HIGH), +}; + +static const struct soc_amd_gpio morphius_v2_gpio_set_stage_ram[] = { + /* USB_OC4_L - USB_A1 */ + PAD_NF(GPIO_14, USB_OC4_L, PULL_UP), + /* USB_OC2_L - USB A0 */ + PAD_NF(GPIO_18, USB_OC2_L, PULL_UP), +}; + +const struct soc_amd_gpio *variant_override_gpio_table(size_t *size) +{ + uint32_t board_version; + + /* + * If board version cannot be read, assume that this is an older revision of the board + * and so apply overrides. If board version is provided by the EC, then apply overrides + * if version < 2. + */ + if (google_chromeec_cbi_get_board_version(&board_version)) + board_version = 1; + + if (board_version <= 1) { + *size = ARRAY_SIZE(morphius_v1_gpio_set_stage_ram); + return morphius_v1_gpio_set_stage_ram; + } else if (board_version <= 2) { + *size = ARRAY_SIZE(morphius_v2_gpio_set_stage_ram); + return morphius_v2_gpio_set_stage_ram; + } + + *size = 0; + return NULL; +} diff --git a/src/mainboard/google/zork/variants/morphius/include/variant/acpi/audio.asl b/src/mainboard/google/zork/variants/morphius/include/variant/acpi/audio.asl new file mode 100644 index 0000000000..900e36f277 --- /dev/null +++ b/src/mainboard/google/zork/variants/morphius/include/variant/acpi/audio.asl @@ -0,0 +1,3 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/acpi/audio.asl> diff --git a/src/mainboard/google/zork/variants/morphius/include/variant/acpi/mainboard.asl b/src/mainboard/google/zork/variants/morphius/include/variant/acpi/mainboard.asl new file mode 100644 index 0000000000..a1161edb5f --- /dev/null +++ b/src/mainboard/google/zork/variants/morphius/include/variant/acpi/mainboard.asl @@ -0,0 +1,3 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/acpi/mainboard.asl> diff --git a/src/mainboard/google/zork/variants/morphius/include/variant/acpi/sleep.asl b/src/mainboard/google/zork/variants/morphius/include/variant/acpi/sleep.asl new file mode 100644 index 0000000000..8177a9df2a --- /dev/null +++ b/src/mainboard/google/zork/variants/morphius/include/variant/acpi/sleep.asl @@ -0,0 +1,3 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/acpi/sleep.asl> diff --git a/src/mainboard/google/zork/variants/morphius/include/variant/acpi/thermal.asl b/src/mainboard/google/zork/variants/morphius/include/variant/acpi/thermal.asl new file mode 100644 index 0000000000..7a793d8102 --- /dev/null +++ b/src/mainboard/google/zork/variants/morphius/include/variant/acpi/thermal.asl @@ -0,0 +1,3 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/acpi/thermal.asl> diff --git a/src/mainboard/google/zork/variants/morphius/include/variant/ec.h b/src/mainboard/google/zork/variants/morphius/include/variant/ec.h new file mode 100644 index 0000000000..e177507e22 --- /dev/null +++ b/src/mainboard/google/zork/variants/morphius/include/variant/ec.h @@ -0,0 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/ec.h> + +/* Enable PS/2 Mouse */ +#define SIO_EC_ENABLE_PS2M diff --git a/src/mainboard/google/zork/variants/morphius/include/variant/gpio.h b/src/mainboard/google/zork/variants/morphius/include/variant/gpio.h new file mode 100644 index 0000000000..dfaeec3ae1 --- /dev/null +++ b/src/mainboard/google/zork/variants/morphius/include/variant/gpio.h @@ -0,0 +1,3 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/gpio.h> diff --git a/src/mainboard/google/zork/variants/morphius/include/variant/thermal.h b/src/mainboard/google/zork/variants/morphius/include/variant/thermal.h new file mode 100644 index 0000000000..2af647973d --- /dev/null +++ b/src/mainboard/google/zork/variants/morphius/include/variant/thermal.h @@ -0,0 +1,3 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/thermal.h> diff --git a/src/mainboard/google/zork/variants/morphius/overridetree.cb b/src/mainboard/google/zork/variants/morphius/overridetree.cb new file mode 100644 index 0000000000..b4a801566e --- /dev/null +++ b/src/mainboard/google/zork/variants/morphius/overridetree.cb @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +chip soc/amd/picasso + + # Start : OPN Performance Configuration + # See devhub #55593 Chapter 3.2 for documentation + # For the below fields, 0 indicates use SOC default + + # System config index + register "system_config" = "2" + + # Set STAPM confiuration. All of these fields must be set >0 to take affect + register "slow_ppt_limit" = "20000" #mw + register "fast_ppt_limit" = "24000" #mw + register "slow_ppt_time_constant" = "5" #second + register "stapm_time_constant" = "200" #second + register "sustained_power_limit" = "12000" #mw + + register "telemetry_vddcr_vdd_slope" = "78289" #mA + register "telemetry_vddcr_vdd_offset" = "0" + register "telemetry_vddcr_soc_slope" = "24519" #mA + register "telemetry_vddcr_soc_offset" = "0" + + # End : OPN Performance Configuration + + # Enable I2C2 for trackpad, touchscreen, pen at 400kHz + register "i2c[2]" = "{ + .speed = I2C_SPEED_FAST, + .rise_time_ns = 18, /* 0 to 2.31 (3.3 * .7) */ + .fall_time_ns = 57, /* 2.31 to 0 */ + }" + + # Enable I2C3 for H1 400kHz + register "i2c[3]" = "{ + .speed = I2C_SPEED_FAST, + .rise_time_ns = 184, /* 0 to 1.26v (1.8 * .7) */ + .fall_time_ns = 42, /* 1.26v to 0 */ + .early_init = true, + }" + + # See AMD 55570-B1 Table 13: PCI Device ID Assignments. + device domain 0 on + subsystemid 0x1022 0x1510 inherit + device pci 1.6 off end # GPP Bridge 5 + device pci 1.7 on end # GPP Bridge 6 - NVME + device pci 8.1 on # Internal GPP Bridge 0 to Bus A + device pci 0.3 on end # USB 3.1 + device pci 0.4 on end # USB 3.1 + end + device pci 14.6 off end # Non-Functional SDHCI + end # domain + + device mmio 0xfedc4000 on + chip drivers/i2c/generic + register "hid" = ""ELAN0000"" + register "desc" = ""ELAN Touchpad"" + register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_9)" + register "wake" = "7" + register "probed" = "1" + device i2c 15 on end + end + chip drivers/i2c/hid + register "generic.hid" = ""PNP0C50"" + register "generic.desc" = ""Synaptics Touchpad"" + register "generic.irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_9)" + register "generic.wake" = "7" + register "generic.probed" = "1" + register "hid_desc_reg_offset" = "0x20" + device i2c 2c on end + end + chip drivers/i2c/hid + register "generic.hid" = ""GTCH7375L"" + register "generic.desc" = ""G2TOUCH Touchscreen"" + register "generic.irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_12)" + register "generic.probed" = "1" + register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_140)" + register "generic.reset_delay_ms" = "120" + register "generic.has_power_resource" = "1" + register "generic.disable_gpio_export_in_crs" = "1" + register "hid_desc_reg_offset" = "0x01" + device i2c 5d on end + end + end +end # chip soc/amd/picasso diff --git a/src/mainboard/google/zork/variants/morphius/romstage.c b/src/mainboard/google/zork/variants/morphius/romstage.c new file mode 100644 index 0000000000..876b836adc --- /dev/null +++ b/src/mainboard/google/zork/variants/morphius/romstage.c @@ -0,0 +1,42 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <stddef.h> +#include <soc/romstage.h> +#include <baseboard/variants.h> +#include <ec/google/chromeec/ec.h> + +#include <gpio.h> +#include <soc/gpio.h> +#include <variant/gpio.h> +#include <delay.h> + +void variant_romstage_entry(void) +{ + //SET WIFI_PCIE_RESET_L HIGH + gpio_set(WIFI_PCIE_RESET_L, 1); + + /* Power the wifi card */ + /* wait 10ms to discharge EN_PWR_WIFI to 0V */ + mdelay(10); + gpio_set(EN_PWR_WIFI, 1); + + /* SET WIFI_PCIE_RESET_L LOW */ + gpio_set(WIFI_PCIE_RESET_L, 0); + + /* Qualcomm Atheros NFA344A needs at least 10ms delay */ + mdelay(10); + + /* SET WIFI_PCIE_RESET_L HIGH */ + gpio_set(WIFI_PCIE_RESET_L, 1); +} + +static const struct soc_amd_gpio morphius_gpio_set_wifi[] = { + /* EN_PWR_WIFI - Power off. Pull high in romstage.c */ + PAD_GPO(GPIO_29, LOW), +}; + +const struct soc_amd_gpio *variant_wifi_romstage_gpio_table(size_t *size) +{ + *size = ARRAY_SIZE(morphius_gpio_set_wifi); + return morphius_gpio_set_wifi; +} diff --git a/src/mainboard/google/zork/variants/morphius/spd/Makefile.inc b/src/mainboard/google/zork/variants/morphius/spd/Makefile.inc new file mode 100644 index 0000000000..4f0929f422 --- /dev/null +++ b/src/mainboard/google/zork/variants/morphius/spd/Makefile.inc @@ -0,0 +1,26 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +# Ordered List of APCB entries, up to 16. +# Entries should match this pattern {NAME}_x{1,2} +# There should be a matching SPD hex file in SPD_SOURCES_DIR +# matching the pattern {NAME}.spd.hex +# The _x{1,2} suffix denotes single or dual channel +# Alternatively, generated APCBs stored at +# 3rdparty/blobs/mainboard/$(MAINBOARDDIR)/APCB_{NAME}.bin will be included. +APCB_SOURCES = samsung-K4AAG165WA-BCWE_x2 # 0b0000 +APCB_SOURCES += empty # 0b0001 +# b/149596178: We can't use dual channel channel until the PSP supports missing +# channels. +APCB_SOURCES += micron-MT40A512M16TB-062E-J_x1 # 0b0010 +APCB_SOURCES += micron-MT40A1G16KD-062E-E_x2 # 0b0011 +APCB_SOURCES += samsung-K4A8G165WC-BCWE_x1 # 0b0100 +APCB_SOURCES += hynix-H5AN8G6NDJR-XNC_x1 # 0b0101 +APCB_SOURCES += micron-MT40A512M16TB-062E-J_x1 # 0b0110 +APCB_SOURCES += samsung-K4AAG165WA-BCWE_x2 # 0b0111 +APCB_SOURCES += hynix-H5ANAG6NCMR-XNC_x2 # 0b1000 +APCB_SOURCES += empty # 0b1001 +APCB_SOURCES += empty # 0b1010 +APCB_SOURCES += empty # 0b1011 +APCB_SOURCES += empty # 0b1100 +APCB_SOURCES += empty # 0b1101 +APCB_SOURCES += empty # 0b1110 |