aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c')
-rw-r--r--src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c37
1 files changed, 16 insertions, 21 deletions
diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
index b3cbf67307..a998cd710c 100644
--- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
+++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
@@ -9,19 +9,6 @@
#include <boardid.h>
#include <variant/gpio.h>
-static const struct soc_amd_gpio gpio_set_stage_rom[] = {
- /* NVME_AUX_RESET_L */
- PAD_GPO(GPIO_40, HIGH),
- /* CLK_REQ0_L - WIFI */
- PAD_NF(GPIO_92, CLK_REQ0_L, PULL_UP),
- /* CLK_REQ1_L - SD Card */
- PAD_NF(GPIO_115, CLK_REQ1_L, PULL_UP),
- /* CLK_REQ4_L - SSD */
- PAD_NF(GPIO_132, CLK_REQ4_L, PULL_UP),
- /* SD_AUX_RESET_L */
- PAD_GPO(GPIO_142, HIGH),
-};
-
static const struct soc_amd_gpio gpio_set_stage_ram[] = {
/* PWR_BTN_L */
@@ -136,13 +123,6 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = {
};
const __weak
-struct soc_amd_gpio *variant_romstage_gpio_table(size_t *size)
-{
- *size = ARRAY_SIZE(gpio_set_stage_rom);
- return gpio_set_stage_rom;
-}
-
-const __weak
struct soc_amd_gpio *variant_base_gpio_table(size_t *size)
{
*size = ARRAY_SIZE(gpio_set_stage_ram);
@@ -243,8 +223,23 @@ static void wifi_power_reset_configure_pre_v3(void)
gpio_set(GPIO_42, 1);
}
-__weak void variant_pcie_power_reset_configure(void)
+__weak void variant_pcie_gpio_configure(void)
{
+ static const struct soc_amd_gpio pcie_gpio_table[] = {
+ /* NVME_AUX_RESET_L */
+ PAD_GPO(GPIO_40, HIGH),
+ /* CLK_REQ0_L - WIFI */
+ PAD_NF(GPIO_92, CLK_REQ0_L, PULL_UP),
+ /* CLK_REQ1_L - SD Card */
+ PAD_NF(GPIO_115, CLK_REQ1_L, PULL_UP),
+ /* CLK_REQ4_L - SSD */
+ PAD_NF(GPIO_132, CLK_REQ4_L, PULL_UP),
+ /* SD_AUX_RESET_L */
+ PAD_GPO(GPIO_142, HIGH),
+ };
+
+ program_gpios(pcie_gpio_table, ARRAY_SIZE(pcie_gpio_table));
+
if (variant_uses_v3_schematics())
wifi_power_reset_configure_v3();
else