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Diffstat (limited to 'src/mainboard/google/volteer')
-rw-r--r--src/mainboard/google/volteer/Kconfig13
-rw-r--r--src/mainboard/google/volteer/Kconfig.name9
-rw-r--r--src/mainboard/google/volteer/variants/volteer2/gpio.c5
-rw-r--r--src/mainboard/google/volteer/variants/volteer2/overridetree.cb26
4 files changed, 52 insertions, 1 deletions
diff --git a/src/mainboard/google/volteer/Kconfig b/src/mainboard/google/volteer/Kconfig
index 8fd119e6da..23dbf68fe9 100644
--- a/src/mainboard/google/volteer/Kconfig
+++ b/src/mainboard/google/volteer/Kconfig
@@ -24,7 +24,8 @@ config BOARD_GOOGLE_BASEBOARD_VOLTEER
select HAVE_ACPI_TABLES
select INTEL_LPSS_UART_FOR_CONSOLE
select MAINBOARD_HAS_CHROMEOS
- select MAINBOARD_HAS_SPI_TPM_CR50
+ select MAINBOARD_HAS_SPI_TPM_CR50 if !BOARD_GOOGLE_VOLTEER2_TI50
+ select MAINBOARD_HAS_I2C_TPM_CR50 if BOARD_GOOGLE_VOLTEER2_TI50
select MAINBOARD_HAS_TPM2
select PCIEXP_HOTPLUG
select SOC_INTEL_TIGERLAKE
@@ -71,6 +72,14 @@ config OVERRIDE_DEVICETREE
config DRIVER_TPM_SPI_BUS
default 0x1
+config DRIVER_TPM_I2C_BUS
+ hex
+ default 0x1
+
+config DRIVER_TPM_I2C_ADDR
+ hex
+ default 0x50
+
config MAINBOARD_DIR
string
default "google/volteer"
@@ -91,6 +100,7 @@ config MAINBOARD_PART_NUMBER
default "Trondo" if BOARD_GOOGLE_TRONDO
default "Volteer" if BOARD_GOOGLE_VOLTEER
default "Volteer2" if BOARD_GOOGLE_VOLTEER2
+ default "Volteer2_Ti50" if BOARD_GOOGLE_VOLTEER2_TI50
default "Voxel" if BOARD_GOOGLE_VOXEL
default "Boldar" if BOARD_GOOGLE_BOLDAR
default "Elemi" if BOARD_GOOGLE_ELEMI
@@ -130,6 +140,7 @@ config VARIANT_DIR
default "trondo" if BOARD_GOOGLE_TRONDO
default "volteer" if BOARD_GOOGLE_VOLTEER
default "volteer2" if BOARD_GOOGLE_VOLTEER2
+ default "volteer2" if BOARD_GOOGLE_VOLTEER2_TI50
default "voxel" if BOARD_GOOGLE_VOXEL
default "boldar" if BOARD_GOOGLE_BOLDAR
default "elemi" if BOARD_GOOGLE_ELEMI
diff --git a/src/mainboard/google/volteer/Kconfig.name b/src/mainboard/google/volteer/Kconfig.name
index 9e48a2fcfc..d8f1b4470c 100644
--- a/src/mainboard/google/volteer/Kconfig.name
+++ b/src/mainboard/google/volteer/Kconfig.name
@@ -58,6 +58,15 @@ config BOARD_GOOGLE_VOLTEER2
select USE_CAR_NEM_ENHANCED_V2
select DRIVERS_GENESYSLOGIC_GL9755
+# Reworked Volteer2 prototype, Haven chip replaced with Dauntless demo board
+config BOARD_GOOGLE_VOLTEER2_TI50
+ bool "-> Volteer2_Ti50"
+ select BOARD_GOOGLE_BASEBOARD_VOLTEER
+ select VARIANT_HAS_MIPI_CAMERA
+ select SOC_INTEL_CSE_LITE_SKU
+ select USE_CAR_NEM_ENHANCED_V2
+ select DRIVERS_GENESYSLOGIC_GL9755
+
config BOARD_GOOGLE_VOXEL
bool "-> Voxel"
select BOARD_GOOGLE_BASEBOARD_VOLTEER
diff --git a/src/mainboard/google/volteer/variants/volteer2/gpio.c b/src/mainboard/google/volteer/variants/volteer2/gpio.c
index 6c67fc216e..069b2f0a98 100644
--- a/src/mainboard/google/volteer/variants/volteer2/gpio.c
+++ b/src/mainboard/google/volteer/variants/volteer2/gpio.c
@@ -243,6 +243,11 @@ static const struct pad_config early_gpio_table[] = {
/* H11 : SRCCLKREQ5# ==> WLAN_PERST_L */
PAD_CFG_GPO(GPP_H11, 1, DEEP),
+
+ /* The two signals used for I2C communication with Ti50 on the
+ * volteer2_ti50 variant. */
+ PAD_CFG_NF(GPP_C18, NONE, DEEP, NF1), /* PCH_I2C1_TOUCH_USI_SDA */
+ PAD_CFG_NF(GPP_C19, NONE, DEEP, NF1), /* PCH_I2C1_TOUCH_USI_SCL */
};
const struct pad_config *variant_override_gpio_table(size_t *num)
diff --git a/src/mainboard/google/volteer/variants/volteer2/overridetree.cb b/src/mainboard/google/volteer/variants/volteer2/overridetree.cb
index a36a8441b4..502883eee8 100644
--- a/src/mainboard/google/volteer/variants/volteer2/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/volteer2/overridetree.cb
@@ -56,6 +56,32 @@ chip soc/intel/tigerlake
register "FastPkgCRampDisable[VR_DOMAIN_SA]" = "1"
register "FastPkgCRampDisable[VR_DOMAIN_VLCC]" = "1"
+ # Depending on whether we use I2C bus 1 or SPI bus 0 for TPM
+ # communication, that one needs early initialization.
+ register "common_soc_config" = "{
+ .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
+ .gspi[0] = {
+ .speed_mhz = 1,
+ .early_init = CONFIG(MAINBOARD_HAS_SPI_TPM_CR50),
+ },
+ .i2c[0] = {
+ .speed = I2C_SPEED_FAST,
+ },
+ .i2c[1] = {
+ .speed = I2C_SPEED_FAST,
+ .early_init = CONFIG(MAINBOARD_HAS_I2C_TPM_CR50),
+ },
+ .i2c[2] = {
+ .speed = I2C_SPEED_FAST,
+ },
+ .i2c[3] = {
+ .speed = I2C_SPEED_FAST,
+ },
+ .i2c[5] = {
+ .speed = I2C_SPEED_FAST,
+ },
+ }"
+
device domain 0 on
device ref dptf on
chip drivers/intel/dptf