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Diffstat (limited to 'src/mainboard/google/volteer/dsdt.asl')
| -rw-r--r-- | src/mainboard/google/volteer/dsdt.asl | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/src/mainboard/google/volteer/dsdt.asl b/src/mainboard/google/volteer/dsdt.asl index cf733676e3..ba9541ee5d 100644 --- a/src/mainboard/google/volteer/dsdt.asl +++ b/src/mainboard/google/volteer/dsdt.asl @@ -38,10 +38,6 @@ DefinitionBlock( // Chrome OS specific #include <vendorcode/google/chromeos/acpi/chromeos.asl> - /* Include Low power idle table for a short term workaround to enable - S0ix. Once cr50 pulse width is fixed, this can be removed. */ - #include <soc/intel/common/acpi/lpit.asl> - // Chrome OS Embedded Controller Scope (\_SB.PCI0.LPCB) { |