diff options
Diffstat (limited to 'src/mainboard/google/veyron_speedy')
-rw-r--r-- | src/mainboard/google/veyron_speedy/Kconfig | 4 | ||||
-rw-r--r-- | src/mainboard/google/veyron_speedy/board.h | 2 | ||||
-rw-r--r-- | src/mainboard/google/veyron_speedy/bootblock.c | 7 | ||||
-rw-r--r-- | src/mainboard/google/veyron_speedy/mainboard.c | 16 | ||||
-rw-r--r-- | src/mainboard/google/veyron_speedy/romstage.c | 4 |
5 files changed, 18 insertions, 15 deletions
diff --git a/src/mainboard/google/veyron_speedy/Kconfig b/src/mainboard/google/veyron_speedy/Kconfig index d5e764cc06..833d94bbd3 100644 --- a/src/mainboard/google/veyron_speedy/Kconfig +++ b/src/mainboard/google/veyron_speedy/Kconfig @@ -84,4 +84,8 @@ config CONSOLE_SERIAL_UART_ADDRESS depends on CONSOLE_SERIAL_UART default 0xFF690000 +config PMIC_BUS + int + default 0 + endif # BOARD_GOOGLE_VEYRON_SPEEDY diff --git a/src/mainboard/google/veyron_speedy/board.h b/src/mainboard/google/veyron_speedy/board.h index c3d75bd0f2..244cdfb762 100644 --- a/src/mainboard/google/veyron_speedy/board.h +++ b/src/mainboard/google/veyron_speedy/board.h @@ -23,8 +23,6 @@ #include <boardid.h> #include <gpio.h> -#define PMIC_BUS 0 - #define GPIO_RESET GPIO(0, B, 5) /* TODO: move setup_chromeos_gpios() here once bootblock code is in mainboard */ diff --git a/src/mainboard/google/veyron_speedy/bootblock.c b/src/mainboard/google/veyron_speedy/bootblock.c index 5571d456f8..90ad744980 100644 --- a/src/mainboard/google/veyron_speedy/bootblock.c +++ b/src/mainboard/google/veyron_speedy/bootblock.c @@ -48,12 +48,13 @@ void bootblock_mainboard_init(void) /* Up VDD_CPU (BUCK1) to 1.4V to support max CPU frequency (1.8GHz). */ setbits_le32(&rk3288_pmu->iomux_i2c0scl, IOMUX_I2C0SCL); setbits_le32(&rk3288_pmu->iomux_i2c0sda, IOMUX_I2C0SDA); - i2c_init(PMIC_BUS, 400*KHz); + assert(CONFIG_PMIC_BUS == 0); /* must correspond with IOMUX */ + i2c_init(CONFIG_PMIC_BUS, 400*KHz); /* Slowly raise to max CPU voltage to prevent overshoot */ - rk808_configure_buck(PMIC_BUS, 1, 1200); + rk808_configure_buck(1, 1200); udelay(175);/* Must wait for voltage to stabilize,2mV/us */ - rk808_configure_buck(PMIC_BUS, 1, 1400); + rk808_configure_buck(1, 1400); udelay(100);/* Must wait for voltage to stabilize,2mV/us */ rkclk_configure_cpu(); diff --git a/src/mainboard/google/veyron_speedy/mainboard.c b/src/mainboard/google/veyron_speedy/mainboard.c index c7d51cc948..3bf5724e37 100644 --- a/src/mainboard/google/veyron_speedy/mainboard.c +++ b/src/mainboard/google/veyron_speedy/mainboard.c @@ -54,8 +54,8 @@ static void configure_sdmmc(void) writel(RK_CLRBITS(1 << 12), &rk3288_grf->soc_con0); /* Note: these power rail definitions are copied in romstage.c */ - rk808_configure_ldo(PMIC_BUS, 4, 3300); /* VCCIO_SD */ - rk808_configure_ldo(PMIC_BUS, 5, 3300); /* VCC33_SD */ + rk808_configure_ldo(4, 3300); /* VCCIO_SD */ + rk808_configure_ldo(5, 3300); /* VCC33_SD */ gpio_input(GPIO(7, A, 5)); /* SD_DET */ } @@ -77,7 +77,7 @@ static void configure_codec(void) writel(IOMUX_I2S, &rk3288_grf->iomux_i2s); writel(IOMUX_I2SCLK, &rk3288_grf->iomux_i2sclk); - rk808_configure_ldo(PMIC_BUS, 6, 1800); /* VCC18_CODEC */ + rk808_configure_ldo(6, 1800); /* VCC18_CODEC */ /* AUDIO IO domain 1.8V voltage selection */ writel(RK_SETBITS(1 << 6), &rk3288_grf->io_vsel); @@ -93,15 +93,15 @@ static void configure_vop(void) switch (board_id()) { case 0: - rk808_configure_switch(PMIC_BUS, 2, 1); /* VCC18_LCD */ - rk808_configure_ldo(PMIC_BUS, 7, 2500); /* VCC10_LCD_PWREN_H */ - rk808_configure_switch(PMIC_BUS, 1, 1); /* VCC33_LCD */ + rk808_configure_switch(2, 1); /* VCC18_LCD */ + rk808_configure_ldo(7, 2500); /* VCC10_LCD_PWREN_H */ + rk808_configure_switch(1, 1); /* VCC33_LCD */ break; default: gpio_output(GPIO(2, B, 5), 1); /* AVDD_1V8_DISP_EN */ - rk808_configure_ldo(PMIC_BUS, 7, 2500); /* VCC10_LCD_PWREN_H */ + rk808_configure_ldo(7, 2500); /* VCC10_LCD_PWREN_H */ gpio_output(GPIO(7, B, 6), 1); /* LCD_EN */ - rk808_configure_switch(PMIC_BUS, 1, 1); /* VCC33_LCD */ + rk808_configure_switch(1, 1); /* VCC33_LCD */ break; } } diff --git a/src/mainboard/google/veyron_speedy/romstage.c b/src/mainboard/google/veyron_speedy/romstage.c index 2dec53c332..c18471abe5 100644 --- a/src/mainboard/google/veyron_speedy/romstage.c +++ b/src/mainboard/google/veyron_speedy/romstage.c @@ -80,8 +80,8 @@ static void configure_l2ctlr(void) static void sdmmc_power_off(void) { - rk808_configure_ldo(PMIC_BUS, 4, 0); /* VCCIO_SD */ - rk808_configure_ldo(PMIC_BUS, 5, 0); /* VCC33_SD */ + rk808_configure_ldo(4, 0); /* VCCIO_SD */ + rk808_configure_ldo(5, 0); /* VCC33_SD */ } void main(void) |