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-rw-r--r--src/mainboard/google/stout/Kconfig1
-rw-r--r--src/mainboard/google/stout/romstage.c10
2 files changed, 5 insertions, 6 deletions
diff --git a/src/mainboard/google/stout/Kconfig b/src/mainboard/google/stout/Kconfig
index ec03d8761e..eca83da637 100644
--- a/src/mainboard/google/stout/Kconfig
+++ b/src/mainboard/google/stout/Kconfig
@@ -13,6 +13,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_CMOS_DEFAULT
select HAVE_ACPI_RESUME
select MAINBOARD_HAS_CHROMEOS
+ select MAINBOARD_HAS_LPC_TPM
select INTEL_INT15
select CHROMEOS_VBNV_CMOS
diff --git a/src/mainboard/google/stout/romstage.c b/src/mainboard/google/stout/romstage.c
index ee6ca4f520..31b61e2d72 100644
--- a/src/mainboard/google/stout/romstage.c
+++ b/src/mainboard/google/stout/romstage.c
@@ -40,9 +40,7 @@
#include <halt.h>
#include "gpio.h"
#include <bootmode.h>
-#if CONFIG_CHROMEOS
-#include <vendorcode/google/chromeos/chromeos.h>
-#endif
+#include <tpm.h>
#include <cbfs.h>
#include <ec/quanta/it8518/ec.h>
#include "ec.h"
@@ -251,8 +249,8 @@ void main(unsigned long bist)
northbridge_romstage_finalize(boot_mode==2);
post_code(0x3f);
-#if CONFIG_CHROMEOS
- init_chromeos(boot_mode);
-#endif
+ if (CONFIG_LPC_TPM) {
+ init_tpm(boot_mode == 2);
+ }
timestamp_add_now(TS_END_ROMSTAGE);
}