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-rw-r--r--src/mainboard/google/skyrim/Kconfig2
-rw-r--r--src/mainboard/google/skyrim/variants/baseboard/devicetree.cb4
-rw-r--r--src/mainboard/google/skyrim/variants/skyrim/overridetree.cb4
3 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/google/skyrim/Kconfig b/src/mainboard/google/skyrim/Kconfig
index f00775824f..e96940df03 100644
--- a/src/mainboard/google/skyrim/Kconfig
+++ b/src/mainboard/google/skyrim/Kconfig
@@ -36,7 +36,7 @@ config BOARD_SPECIFIC_OPTIONS
select MAINBOARD_HAS_CHROMEOS
select MAINBOARD_HAS_TPM2
select PSP_DISABLE_POSTCODES # TODO re-enable PSP postcodes later (b/227199049)
- select SOC_AMD_SABRINA
+ select SOC_AMD_MENDOCINO
select SOC_AMD_COMMON_BLOCK_USE_ESPI
select TPM_GOOGLE_TI50
diff --git a/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb b/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb
index 71f1a5f510..9d4b12ceb0 100644
--- a/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb
@@ -1,5 +1,5 @@
# SPDX-License-Identifier: GPL-2.0-or-later
-chip soc/amd/sabrina
+chip soc/amd/mendocino
# eSPI Configuration
register "common_config.espi_config" = "{
@@ -213,4 +213,4 @@ chip soc/amd/sabrina
device generic 3 on end
end
-end # chip soc/amd/sabrina
+end # chip soc/amd/mendocino
diff --git a/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb b/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb
index 89cc63cb0f..d8dc59bd45 100644
--- a/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb
+++ b/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb
@@ -26,7 +26,7 @@ fw_config
end
end
-chip soc/amd/sabrina
+chip soc/amd/mendocino
device domain 0 on
device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A
device ref xhci_1 on # XHCI1 controller
@@ -241,4 +241,4 @@ chip soc/amd/sabrina
end
end # UART1
-end # chip soc/amd/sabrina
+end # chip soc/amd/mendocino