summaryrefslogtreecommitdiff
path: root/src/mainboard/google/sarien/variants
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/google/sarien/variants')
-rw-r--r--src/mainboard/google/sarien/variants/arcada/include/variant/acpi/mainboard.asl8
-rw-r--r--src/mainboard/google/sarien/variants/sarien/include/variant/acpi/mainboard.asl8
2 files changed, 16 insertions, 0 deletions
diff --git a/src/mainboard/google/sarien/variants/arcada/include/variant/acpi/mainboard.asl b/src/mainboard/google/sarien/variants/arcada/include/variant/acpi/mainboard.asl
index 41121d28fe..6eba2bcb21 100644
--- a/src/mainboard/google/sarien/variants/arcada/include/variant/acpi/mainboard.asl
+++ b/src/mainboard/google/sarien/variants/arcada/include/variant/acpi/mainboard.asl
@@ -15,6 +15,8 @@
#define CAM_EN GPP_B11 /* Active low */
#define TS_PD GPP_E7
+#define SSD_EN GPP_H13
+#define SSD_RST GPP_H12
/* Method called from LPIT prior to enter s0ix state */
Method (MS0X, 1)
@@ -35,6 +37,12 @@ Method (MPTS, 1)
/* Clear touch screen pd pin to avoid leakage */
\_SB.PCI0.CTXS (TS_PD)
+
+ /* Clear SSD EN adn RST pin to avoid leakage */
+ If (Arg0 == 5) {
+ \_SB.PCI0.CTXS (SSD_EN)
+ \_SB.PCI0.CTXS (SSD_RST)
+ }
}
/* Method called from _WAK prior to wakeup */
diff --git a/src/mainboard/google/sarien/variants/sarien/include/variant/acpi/mainboard.asl b/src/mainboard/google/sarien/variants/sarien/include/variant/acpi/mainboard.asl
index 41121d28fe..6eba2bcb21 100644
--- a/src/mainboard/google/sarien/variants/sarien/include/variant/acpi/mainboard.asl
+++ b/src/mainboard/google/sarien/variants/sarien/include/variant/acpi/mainboard.asl
@@ -15,6 +15,8 @@
#define CAM_EN GPP_B11 /* Active low */
#define TS_PD GPP_E7
+#define SSD_EN GPP_H13
+#define SSD_RST GPP_H12
/* Method called from LPIT prior to enter s0ix state */
Method (MS0X, 1)
@@ -35,6 +37,12 @@ Method (MPTS, 1)
/* Clear touch screen pd pin to avoid leakage */
\_SB.PCI0.CTXS (TS_PD)
+
+ /* Clear SSD EN adn RST pin to avoid leakage */
+ If (Arg0 == 5) {
+ \_SB.PCI0.CTXS (SSD_EN)
+ \_SB.PCI0.CTXS (SSD_RST)
+ }
}
/* Method called from _WAK prior to wakeup */