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-rw-r--r--src/mainboard/google/reef/variants/baseboard/memory.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/google/reef/variants/baseboard/memory.c b/src/mainboard/google/reef/variants/baseboard/memory.c
index a0aad9ecd8..f298cae95e 100644
--- a/src/mainboard/google/reef/variants/baseboard/memory.c
+++ b/src/mainboard/google/reef/variants/baseboard/memory.c
@@ -17,6 +17,7 @@
#include <gpio.h>
#include <soc/meminit.h>
#include <variant/gpio.h>
+#include <fsp/api.h>
const struct lpddr4_swizzle_cfg baseboard_lpddr4_swizzle = {
/* CH0_DQA[0:31] SoC pins -> U22 LPDDR4 module pins */
@@ -167,3 +168,8 @@ size_t __weak variant_memory_sku(void)
* exist. */
return gpio_pullup_base2_value(pads, ARRAY_SIZE(pads));
}
+
+uint8_t fsp_memory_mainboard_version(void)
+{
+ return 1;
+}