diff options
Diffstat (limited to 'src/mainboard/google/poppy')
4 files changed, 0 insertions, 4 deletions
diff --git a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb index 074e8a2a4c..032c42634a 100644 --- a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb @@ -38,7 +38,6 @@ chip soc/intel/skylake register "DspEnable" = "1" register "IoBufferOwnership" = "3" register "EnableTraceHub" = "0" - register "XdciEnable" = "0" register "SsicPortEnable" = "0" register "SmbusEnable" = "1" register "Cio2Enable" = "1" diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb index 0b3387e2de..a04dd95e8d 100644 --- a/src/mainboard/google/poppy/variants/nami/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb @@ -34,7 +34,6 @@ chip soc/intel/skylake register "DspEnable" = "1" register "IoBufferOwnership" = "3" register "EnableTraceHub" = "0" - register "XdciEnable" = "0" register "SsicPortEnable" = "0" register "SmbusEnable" = "1" register "Cio2Enable" = "0" diff --git a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb index 6946b38f14..8a946823fa 100644 --- a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb @@ -38,7 +38,6 @@ chip soc/intel/skylake register "DspEnable" = "1" register "IoBufferOwnership" = "3" register "EnableTraceHub" = "0" - register "XdciEnable" = "0" register "SsicPortEnable" = "0" register "SmbusEnable" = "1" register "Cio2Enable" = "1" diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb index 65955eb7d9..2688d58148 100644 --- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb +++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb @@ -38,7 +38,6 @@ chip soc/intel/skylake register "DspEnable" = "1" register "IoBufferOwnership" = "3" register "EnableTraceHub" = "0" - register "XdciEnable" = "0" register "SsicPortEnable" = "0" register "SmbusEnable" = "1" register "Cio2Enable" = "1" |