diff options
Diffstat (limited to 'src/mainboard/google/parrot')
| -rw-r--r-- | src/mainboard/google/parrot/cmos.layout | 5 | ||||
| -rw-r--r-- | src/mainboard/google/parrot/devicetree.cb | 2 |
2 files changed, 4 insertions, 3 deletions
diff --git a/src/mainboard/google/parrot/cmos.layout b/src/mainboard/google/parrot/cmos.layout index afdd3c66ca..b7320b5b99 100644 --- a/src/mainboard/google/parrot/cmos.layout +++ b/src/mainboard/google/parrot/cmos.layout @@ -85,7 +85,8 @@ entries # coreboot config options: southbridge 408 1 e 1 nmi 409 2 e 7 power_on_after_fail -#411 5 r 0 unused +411 1 e 8 sata_mode +#412 4 r 0 unused # coreboot config options: bootloader #Used by ChromeOS: @@ -131,6 +132,8 @@ enumerations 7 0 Disable 7 1 Enable 7 2 Keep +8 0 AHCI +8 1 Compatible # ----------------------------------------------------------------- checksums diff --git a/src/mainboard/google/parrot/devicetree.cb b/src/mainboard/google/parrot/devicetree.cb index cd65fbf9a4..59586cc784 100644 --- a/src/mainboard/google/parrot/devicetree.cb +++ b/src/mainboard/google/parrot/devicetree.cb @@ -61,8 +61,6 @@ chip northbridge/intel/sandybridge register "gpi8_routing" = "1" register "gpi15_routing" = "1" #lid switch gpe - register "ide_legacy_combined" = "0x0" - register "sata_ahci" = "0x1" register "sata_port_map" = "0x1" # EC range is 0xFD60 (EC_IO) and 0x68/0x6C |