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-rw-r--r--src/mainboard/google/octopus/variants/baseboard/devicetree.cb7
1 files changed, 4 insertions, 3 deletions
diff --git a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb
index 6f71f169d4..9cab69c167 100644
--- a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb
@@ -42,10 +42,11 @@ chip soc/intel/apollolake
register "gpe0_dw2" = "PMC_GPE_N_95_64"
register "gpe0_dw3" = "PMC_GPE_N_63_32"
- # PL1 override 12000 mW: Due to error in the energy calculation for
+ # PL1 override 8000 mW: Due to error in the energy calculation for
# current VR solution. Experiments show that SoC TDP max (6W) can
- # be reached when RAPL PL1 is set to 12W.
- register "tdp_pl1_override_mw" = "12000"
+ # be reached when RAPL PL1 is set to 8W.
+ # TODO: Need to tune this value on closed chassis system.
+ register "tdp_pl1_override_mw" = "8000"
# Set RAPL PL2 to 15W.
register "tdp_pl2_override_mw" = "15000"