aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/google/nyan_blaze/romstage.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/google/nyan_blaze/romstage.c')
-rw-r--r--src/mainboard/google/nyan_blaze/romstage.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/google/nyan_blaze/romstage.c b/src/mainboard/google/nyan_blaze/romstage.c
index e91fa3379e..e3d7116d1a 100644
--- a/src/mainboard/google/nyan_blaze/romstage.c
+++ b/src/mainboard/google/nyan_blaze/romstage.c
@@ -53,7 +53,7 @@ static void __attribute__((noinline)) romstage(void)
u32 dram_end_mb = sdram_max_addressable_mb();
u32 dram_size_mb = dram_end_mb - dram_start_mb;
-#if !CONFIG_VBOOT_VERIFY_FIRMWARE
+#if !CONFIG_VBOOT
configure_l2_cache();
mmu_init();
/* Device memory below DRAM is uncached. */
@@ -87,7 +87,7 @@ static void __attribute__((noinline)) romstage(void)
cbmem_initialize_empty();
/* This was already called from verstage in vboot context. */
- if (!IS_ENABLED(CONFIG_VBOOT_VERIFY_FIRMWARE))
+ if (!IS_ENABLED(CONFIG_VBOOT))
early_mainboard_init();
run_ramstage();
@@ -96,7 +96,7 @@ static void __attribute__((noinline)) romstage(void)
/* Stub to force arm_init_caches to the top, before any stack/memory accesses */
void main(void)
{
-#if !CONFIG_VBOOT_VERIFY_FIRMWARE
+#if !CONFIG_VBOOT
asm volatile ("bl arm_init_caches"
::: "r0","r1","r2","r3","r4","r5","ip");
#endif