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Diffstat (limited to 'src/mainboard/google/mistral/romstage.c')
-rw-r--r-- | src/mainboard/google/mistral/romstage.c | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/src/mainboard/google/mistral/romstage.c b/src/mainboard/google/mistral/romstage.c new file mode 100644 index 0000000000..41ee4edcbb --- /dev/null +++ b/src/mainboard/google/mistral/romstage.c @@ -0,0 +1,31 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/stages.h> +#include <soc/usb.h> + +static void prepare_usb(void) +{ + /* + * Do DWC3 core and phy reset. Kick these resets off early + * so they get atleast 1msec to settle. + */ + reset_usb(HSUSB_HS_PORT_1); +} + +void platform_romstage_main(void) +{ + prepare_usb(); +} |