diff options
Diffstat (limited to 'src/mainboard/google/link')
| -rw-r--r-- | src/mainboard/google/link/Kconfig | 1 | ||||
| -rw-r--r-- | src/mainboard/google/link/romstage.c | 11 |
2 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/google/link/Kconfig b/src/mainboard/google/link/Kconfig index 316434fbb8..0f709255d2 100644 --- a/src/mainboard/google/link/Kconfig +++ b/src/mainboard/google/link/Kconfig @@ -12,6 +12,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_OPTION_TABLE select HAVE_ACPI_RESUME select MAINBOARD_HAS_CHROMEOS + select MAINBOARD_HAS_LPC_TPM select SERIRQ_CONTINUOUS_MODE select MAINBOARD_HAS_NATIVE_VGA_INIT select CHROMEOS_VBNV_CMOS diff --git a/src/mainboard/google/link/romstage.c b/src/mainboard/google/link/romstage.c index ca8c2bd5ec..b345d5ec3e 100644 --- a/src/mainboard/google/link/romstage.c +++ b/src/mainboard/google/link/romstage.c @@ -41,9 +41,7 @@ #include <cpu/x86/msr.h> #include <halt.h> #include "gpio.h" -#if CONFIG_CHROMEOS -#include <vendorcode/google/chromeos/chromeos.h> -#endif +#include <tpm.h> #include <cbfs.h> #include <southbridge/intel/bd82x6x/chip.h> @@ -246,8 +244,9 @@ void main(unsigned long bist) northbridge_romstage_finalize(boot_mode==2); post_code(0x3f); -#if CONFIG_CHROMEOS - init_chromeos(boot_mode); -#endif + if (CONFIG_LPC_TPM) { + init_tpm(boot_mode == 2); + } + timestamp_add_now(TS_END_ROMSTAGE); } |