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Diffstat (limited to 'src/mainboard/google/lars/devicetree.cb')
-rw-r--r--src/mainboard/google/lars/devicetree.cb6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/google/lars/devicetree.cb b/src/mainboard/google/lars/devicetree.cb
index e377a51c2c..cb49968d55 100644
--- a/src/mainboard/google/lars/devicetree.cb
+++ b/src/mainboard/google/lars/devicetree.cb
@@ -54,14 +54,14 @@ chip soc/intel/skylake
register "PcieRpClkReqNumber[4]" = "2"
register "usb2_ports[0]" = "USB2_PORT_TYPE_C" # Type-C Port 1
- register "usb2_ports[1]" = "USB2_PORT_TYPE_C" # Type-C Port 2
+ register "usb2_ports[1]" = "USB2_PORT_FLEX" # Camera
register "usb2_ports[2]" = "USB2_PORT_MID" # Bluetooth
register "usb2_ports[4]" = "USB2_PORT_MID" # Type-A Port (card)
- register "usb2_ports[6]" = "USB2_PORT_FLEX" # Camera
+ register "usb2_ports[5]" = "USB2_PORT_MID" # SD
register "usb2_ports[8]" = "USB2_PORT_LONG" # Type-A Port (board)
register "usb3_ports[0]" = "USB3_PORT_DEFAULT" # Type-C Port 1
- register "usb3_ports[1]" = "USB3_PORT_DEFAULT" # Type-C Port 2
+ register "usb3_ports[1]" = "USB3_PORT_DEFAULT" # SD
register "usb3_ports[2]" = "USB3_PORT_DEFAULT" # Type-A Port (card)
register "usb3_ports[3]" = "USB3_PORT_DEFAULT" # Type-A Port (board)