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-rw-r--r--src/mainboard/google/kahlee/variants/grunt/devicetree.cb48
-rw-r--r--src/mainboard/google/kahlee/variants/grunt/include/variant/acpi/usb_oc.asl16
-rw-r--r--src/mainboard/google/kahlee/variants/grunt/include/variant/gpio.h16
3 files changed, 80 insertions, 0 deletions
diff --git a/src/mainboard/google/kahlee/variants/grunt/devicetree.cb b/src/mainboard/google/kahlee/variants/grunt/devicetree.cb
new file mode 100644
index 0000000000..6558dec013
--- /dev/null
+++ b/src/mainboard/google/kahlee/variants/grunt/devicetree.cb
@@ -0,0 +1,48 @@
+#
+# This file is part of the coreboot project.
+#
+# Copyright (C) 2015-2017 Advanced Micro Devices, Inc.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+chip soc/amd/stoneyridge
+ device cpu_cluster 0 on
+ device lapic 10 on end
+ end
+ device domain 0 on
+ subsystemid 0x1022 0x1410 inherit
+ device pci 0.0 on end # Root Complex
+ device pci 1.0 on end # Internal Graphics P2P bridge 0x98e4
+ device pci 1.1 on end # Internal Multimedia
+ device pci 2.0 on end # PCIe Host Bridge
+ device pci 2.1 on end #
+ device pci 2.2 on end #
+ device pci 2.3 on end #
+ device pci 2.4 on end #
+ device pci 2.5 on end #
+ device pci 8.0 on end # PSP
+ device pci 9.0 on end # PCIe Host Bridge
+ device pci 9.2 on end # HDA
+ device pci 10.0 on end # xHCI
+ device pci 11.0 on end # SATA
+ device pci 12.0 on end # EHCI
+ device pci 14.0 on # SMbus
+ end # SMbus
+ device pci 14.3 on
+ end # LPC
+ device pci 14.7 on end # SD
+ device pci 18.0 on end
+ device pci 18.1 on end
+ device pci 18.2 on end
+ device pci 18.3 on end
+ device pci 18.4 on end
+ device pci 18.5 on end
+ end #domain
+end #chip soc/amd/stoneyridge
diff --git a/src/mainboard/google/kahlee/variants/grunt/include/variant/acpi/usb_oc.asl b/src/mainboard/google/kahlee/variants/grunt/include/variant/acpi/usb_oc.asl
new file mode 100644
index 0000000000..d22628c7c0
--- /dev/null
+++ b/src/mainboard/google/kahlee/variants/grunt/include/variant/acpi/usb_oc.asl
@@ -0,0 +1,16 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2017 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <baseboard/acpi/usb_oc.asl>
diff --git a/src/mainboard/google/kahlee/variants/grunt/include/variant/gpio.h b/src/mainboard/google/kahlee/variants/grunt/include/variant/gpio.h
new file mode 100644
index 0000000000..5a6b54044f
--- /dev/null
+++ b/src/mainboard/google/kahlee/variants/grunt/include/variant/gpio.h
@@ -0,0 +1,16 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2017 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <baseboard/gpio.h>