summaryrefslogtreecommitdiff
path: root/src/mainboard/google/jecht/chromeos.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/google/jecht/chromeos.c')
-rw-r--r--src/mainboard/google/jecht/chromeos.c17
1 files changed, 12 insertions, 5 deletions
diff --git a/src/mainboard/google/jecht/chromeos.c b/src/mainboard/google/jecht/chromeos.c
index ff4cef6a60..807e37fcb2 100644
--- a/src/mainboard/google/jecht/chromeos.c
+++ b/src/mainboard/google/jecht/chromeos.c
@@ -12,9 +12,6 @@
#include <southbridge/intel/lynxpoint/lp_gpio.h>
#include "onboard.h"
-#define GPIO_SPI_WP 58
-#define GPIO_REC_MODE 12
-
#define FLAG_SPI_WP 0
#define FLAG_REC_MODE 1
@@ -30,6 +27,16 @@ void fill_lb_gpios(struct lb_gpios *gpios)
lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
}
+static bool raw_write_protect_state(void)
+{
+ return get_gpio(GPIO_SPI_WP);
+}
+
+static bool raw_recovery_mode_switch(void)
+{
+ return !get_gpio(GPIO_REC_MODE);
+}
+
int get_write_protect_state(void)
{
const pci_devfn_t dev = PCI_DEV(0, 0x1f, 2);
@@ -48,11 +55,11 @@ void init_bootmode_straps(void)
const pci_devfn_t dev = PCI_DEV(0, 0x1f, 2);
/* Write Protect: GPIO58 = GPIO_SPI_WP, active high */
- if (get_gpio(GPIO_SPI_WP))
+ if (raw_write_protect_state())
flags |= (1 << FLAG_SPI_WP);
/* Recovery: GPIO12 = RECOVERY_L, active low */
- if (!get_gpio(GPIO_REC_MODE))
+ if (raw_recovery_mode_switch())
flags |= (1 << FLAG_REC_MODE);
/* Developer: Virtual */