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Diffstat (limited to 'src/mainboard/google/hatch/variants/nightfury/overridetree.cb')
-rw-r--r--src/mainboard/google/hatch/variants/nightfury/overridetree.cb281
1 files changed, 281 insertions, 0 deletions
diff --git a/src/mainboard/google/hatch/variants/nightfury/overridetree.cb b/src/mainboard/google/hatch/variants/nightfury/overridetree.cb
new file mode 100644
index 0000000000..0cf18e7db4
--- /dev/null
+++ b/src/mainboard/google/hatch/variants/nightfury/overridetree.cb
@@ -0,0 +1,281 @@
+chip soc/intel/cannonlake
+ register "tdp_pl1_override" = "8"
+ register "tdp_pl2_override" = "51"
+
+ register "SerialIoDevMode" = "{
+ [PchSerialIoIndexI2C0] = PchSerialIoPci,
+ [PchSerialIoIndexI2C1] = PchSerialIoPci,
+ [PchSerialIoIndexI2C2] = PchSerialIoPci,
+ [PchSerialIoIndexI2C3] = PchSerialIoPci,
+ [PchSerialIoIndexI2C4] = PchSerialIoPci,
+ [PchSerialIoIndexI2C5] = PchSerialIoPci,
+ [PchSerialIoIndexSPI0] = PchSerialIoPci,
+ [PchSerialIoIndexSPI1] = PchSerialIoPci,
+ [PchSerialIoIndexSPI2] = PchSerialIoDisabled,
+ [PchSerialIoIndexUART0] = PchSerialIoSkipInit,
+ [PchSerialIoIndexUART1] = PchSerialIoDisabled,
+ [PchSerialIoIndexUART2] = PchSerialIoDisabled,
+ }"
+
+ # No PCIe WiFi
+ register "PcieRpEnable[13]" = "0"
+
+ # Enable DMIC1
+ register "PchHdaAudioLinkDmic1" = "1"
+
+ register "usb2_ports[0]" = "USB2_PORT_LONG(OC2)" # Type-C Port 0
+ register "usb2_ports[1]" = "USB2_PORT_LONG(OC2)" # Type-C Port 1
+ register "usb2_ports[2]" = "USB2_PORT_EMPTY"
+ register "usb2_ports[3]" = "USB2_PORT_EMPTY"
+ register "usb2_ports[4]" = "USB2_PORT_EMPTY"
+ register "usb2_ports[5]" = "USB2_PORT_EMPTY"
+ register "usb2_ports[6]" = "USB2_PORT_LONG(OC_SKIP)" # Camera
+ register "usb2_ports[7]" = "USB2_PORT_EMPTY"
+ register "usb2_ports[8]" = "USB2_PORT_EMPTY"
+ register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # CnVi BT
+
+ register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC2)" # Type-C Port 0
+ register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC2)" # Type-C Port 1
+ register "usb3_ports[2]" = "USB3_PORT_EMPTY"
+ register "usb3_ports[3]" = "USB3_PORT_EMPTY"
+ register "usb3_ports[4]" = "USB3_PORT_EMPTY"
+ register "usb3_ports[5]" = "USB3_PORT_EMPTY"
+
+ # Intel Common SoC Config
+ #+-------------------+---------------------------+
+ #| Field | Value |
+ #+-------------------+---------------------------+
+ #| I2C0 | Trackpad |
+ #| I2C1 | Touchscreen |
+ #| I2C2 | Digitizer |
+ #| I2C4 | Audio |
+ #+-------------------+---------------------------+
+ register "common_soc_config" = "{
+ .i2c[0] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 135,
+ .fall_time_ns = 45,
+ },
+ .i2c[1] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 60,
+ .fall_time_ns = 25,
+ },
+ .i2c[2] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 95,
+ .fall_time_ns = 55,
+ },
+ .i2c[4] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 104,
+ .fall_time_ns = 52,
+ },
+ .gspi[0] = {
+ .speed_mhz = 1,
+ .early_init = 1,
+ },
+ }"
+
+ # GPIO for SD card detect
+ register "sdcard_cd_gpio" = "vSD3_CD_B"
+
+ # Enable eMMC HS400
+ register "ScsEmmcHs400Enabled" = "1"
+
+ # EMMC Tx CMD Delay
+ # Refer to EDS-Vol2-14.3.7.
+ # [14:8] steps of delay for DDR mode, each 125ps, range: 0 - 39.
+ # [6:0] steps of delay for SDR mode, each 125ps, range: 0 - 39.
+ register "common_soc_config.emmc_dll.emmc_tx_cmd_cntl" = "0x505"
+
+ # EMMC TX DATA Delay 1
+ # Refer to EDS-Vol2-14.3.8.
+ # [14:8] steps of delay for HS400, each 125ps, range: 0 - 78.
+ # [6:0] steps of delay for SDR104/HS200, each 125ps, range: 0 - 79.
+ register "common_soc_config.emmc_dll.emmc_tx_data_cntl1" = "0x911"
+
+ # EMMC TX DATA Delay 2
+ # Refer to EDS-Vol2-14.3.9.
+ # [30:24] steps of delay for SDR50, each 125ps, range: 0 - 79.
+ # [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78.
+ # [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 -79.
+ # [6:0] steps of delay for SDR12, each 125ps. Range: 0 - 79.
+ register "common_soc_config.emmc_dll.emmc_tx_data_cntl2" = "0x1C262828"
+
+ # EMMC RX CMD/DATA Delay 1
+ # Refer to EDS-Vol2-14.3.10.
+ # [30:24] steps of delay for SDR50, each 125ps, range: 0 - 119.
+ # [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78.
+ # [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 - 119.
+ # [6:0] steps of delay for SDR12, each 125ps, range: 0 - 119.
+ register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl1" = "0x1C16583b"
+
+ # EMMC RX CMD/DATA Delay 2
+ # Refer to EDS-Vol2-14.3.12.
+ # [17:16] stands for Rx Clock before Output Buffer,
+ # 00: Rx clock after output buffer,
+ # 01: Rx clock before output buffer,
+ # 10: Automatic selection based on working mode.
+ # 11: Reserved
+ # [14:8] steps of delay for Auto Tuning Mode, each 125ps, range: 0 - 39.
+ # [6:0] steps of delay for HS200, each 125ps, range: 0 - 79.
+ register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl2" = "0x1001D"
+
+ # EMMC Rx Strobe Delay
+ # Refer to EDS-Vol2-14.3.11.
+ # [14:8] Rx Strobe Delay DLL 1(HS400 Mode), each 125ps, range: 0 - 39.
+ # [6:0] Rx Strobe Delay DLL 2(HS400 Mode), each 125ps, range: 0 - 39.
+ register "common_soc_config.emmc_dll.emmc_rx_strobe_cntl" = "0x1515"
+
+ device domain 0 on
+ device pci 14.0 on
+ chip drivers/usb/acpi
+ device usb 0.0 on
+ chip drivers/usb/acpi
+ register "desc" = ""Left Type-C Port""
+ register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
+ register "group" = "ACPI_PLD_GROUP(1, 1)"
+ device usb 2.0 on end
+ end
+ chip drivers/usb/acpi
+ register "desc" = ""Right Type-C Port""
+ register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
+ register "group" = "ACPI_PLD_GROUP(2, 1)"
+ device usb 2.1 on end
+ end
+ chip drivers/usb/acpi
+ device usb 2.2 off end
+ end
+ chip drivers/usb/acpi
+ device usb 2.3 off end
+ end
+ chip drivers/usb/acpi
+ device usb 2.4 off end
+ end
+ chip drivers/usb/acpi
+ device usb 2.5 off end
+ end
+ chip drivers/usb/acpi
+ register "desc" = ""Camera""
+ register "type" = "UPC_TYPE_INTERNAL"
+ device usb 2.6 on end
+ end
+ chip drivers/usb/acpi
+ device usb 2.7 off end
+ end
+ chip drivers/usb/acpi
+ device usb 2.8 off end
+ end
+ chip drivers/usb/acpi
+ register "desc" = ""Bluetooth""
+ register "type" = "UPC_TYPE_INTERNAL"
+ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C14)"
+ device usb 2.9 on end
+ end
+ chip drivers/usb/acpi
+ register "desc" = ""Left Type-C Port""
+ register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
+ register "group" = "ACPI_PLD_GROUP(1, 1)"
+ device usb 3.0 on end
+ end
+ chip drivers/usb/acpi
+ register "desc" = ""Right Type-C Port""
+ register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
+ register "group" = "ACPI_PLD_GROUP(2, 1)"
+ device usb 3.1 on end
+ end
+ chip drivers/usb/acpi
+ device usb 3.2 off end
+ end
+ chip drivers/usb/acpi
+ device usb 3.3 off end
+ end
+ chip drivers/usb/acpi
+ device usb 3.4 off end
+ end
+ end
+ end
+ end
+
+ device pci 15.0 on
+ chip drivers/i2c/hid
+ register "generic.hid" = ""PNP0C50""
+ register "generic.desc" = ""Synaptics Touchpad""
+ register "generic.irq" = "ACPI_IRQ_WAKE_EDGE_LOW(GPP_A21_IRQ)"
+ register "generic.probed" = "1"
+ register "generic.wake" = "GPE0_DW0_21"
+ register "hid_desc_reg_offset" = "0x20"
+ device i2c 0x20 on end
+ end
+ end # I2C 0
+
+ device pci 15.1 on
+ chip drivers/i2c/generic
+ register "hid" = "ACPI_DT_NAMESPACE_HID"
+ register "compat_string" = ""atmel,maxtouch""
+ register "desc" = ""Atmel Touchscreen""
+ register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_D16_IRQ)"
+ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D15)"
+ register "reset_delay_ms" = "91" # 90.5 ms
+ register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C12)"
+ register "enable_delay_ms" = "1" # 90 ns
+ register "has_power_resource" = "1"
+ register "disable_gpio_export_in_crs" = "1"
+ register "probed" = "1"
+ device i2c 4b on end
+ end
+
+ chip drivers/i2c/generic
+ register "hid" = ""ELAN0001""
+ register "desc" = ""ELAN Touchscreen""
+ register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_D16_IRQ)"
+ register "probed" = "1"
+ register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C12)"
+ register "enable_delay_ms" = "10"
+ register "enable_off_delay_ms" = "100"
+ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D15)"
+ register "reset_delay_ms" = "20"
+ register "reset_off_delay_ms" = "2"
+ register "has_power_resource" = "1"
+ device i2c 10 on end
+ end
+ end # I2C #1
+
+ device pci 15.2 off end # I2C #2
+
+ device pci 19.0 on
+ chip drivers/i2c/da7219
+ # TODO: these settings were copied from another board
+ # with the same chip. verify the settings
+ register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_H0)"
+ register "btn_cfg" = "50"
+ register "mic_det_thr" = "500"
+ register "jack_ins_deb" = "20"
+ register "jack_det_rate" = ""32ms_64ms""
+ register "jack_rem_deb" = "1"
+ register "a_d_btn_thr" = "0xa"
+ register "d_b_btn_thr" = "0x16"
+ register "b_c_btn_thr" = "0x21"
+ register "c_mic_btn_thr" = "0x3e"
+ register "btn_avg" = "4"
+ register "adc_1bit_rpt" = "1"
+ register "micbias_lvl" = "2600"
+ register "mic_amp_in_sel" = ""diff""
+ device i2c 0x1a on end
+ end
+ end
+
+ # No PCIe WiFi
+ device pci 1d.5 off end
+ device pci 1a.0 on end #eMMC
+ device pci 1e.3 off end # GSPI #1
+ device pci 1f.3 on
+ chip drivers/generic/max98357a
+ register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H3)"
+ register "sdmode_delay" = "5"
+ device generic 0 on end
+ end
+ end # Intel HDA
+ end # domain
+end
generated by cgit v1.2.3 (git 2.39.1) at 2024-08-23 06:38:50 +0000