diff options
Diffstat (limited to 'src/mainboard/google/hatch/romstage_spd_smbus.c')
| -rw-r--r-- | src/mainboard/google/hatch/romstage_spd_smbus.c | 32 |
1 files changed, 30 insertions, 2 deletions
diff --git a/src/mainboard/google/hatch/romstage_spd_smbus.c b/src/mainboard/google/hatch/romstage_spd_smbus.c index 300cac009d..d21e86792d 100644 --- a/src/mainboard/google/hatch/romstage_spd_smbus.c +++ b/src/mainboard/google/hatch/romstage_spd_smbus.c @@ -4,6 +4,7 @@ #include <soc/cnl_memcfg_init.h> #include <soc/romstage.h> #include <spd_bin.h> +#include <spd_cache.h> void mainboard_memory_init_params(FSPM_UPD *memupd) { @@ -15,8 +16,35 @@ void mainboard_memory_init_params(FSPM_UPD *memupd) .addr_map = { 0x50, 0x52, }, }; - /* Access memory info through SMBUS. */ - get_spd_smbus(&blk); + uint8_t *spd_cache; + size_t spd_cache_sz; + bool need_update_cache = false; + bool dimm_changed = true; + + /* load spd cache from RW_SPD_CACHE */ + if (load_spd_cache(&spd_cache, &spd_cache_sz) == CB_SUCCESS) { + if (!spd_cache_is_valid(spd_cache, spd_cache_sz)) { + printk(BIOS_WARNING, "Invalid SPD cache\n"); + } else { + dimm_changed = check_if_dimm_changed(spd_cache, &blk); + if (dimm_changed && memupd->FspmArchUpd.NvsBufferPtr != NULL) { + /* Set mrc_cache as invalid */ + printk(BIOS_INFO, "Set mrc_cache as invalid\n"); + memupd->FspmArchUpd.NvsBufferPtr = NULL; + } + } + need_update_cache = true; + } + + if (!dimm_changed) { + spd_fill_from_cache(spd_cache, &blk); + } else { + /* Access memory info through SMBUS. */ + get_spd_smbus(&blk); + + if (need_update_cache && update_spd_cache(&blk) == CB_ERR) + printk(BIOS_WARNING, "update SPD cache failed\n"); + } if (blk.spd_array[0] == NULL) { memcfg.spd[0].read_type = NOT_EXISTING; |