diff options
Diffstat (limited to 'src/mainboard/google/gru/bootblock.c')
| -rw-r--r-- | src/mainboard/google/gru/bootblock.c | 71 |
1 files changed, 51 insertions, 20 deletions
diff --git a/src/mainboard/google/gru/bootblock.c b/src/mainboard/google/gru/bootblock.c index 26af58cd81..0e916d298d 100644 --- a/src/mainboard/google/gru/bootblock.c +++ b/src/mainboard/google/gru/bootblock.c @@ -63,42 +63,73 @@ void bootblock_mainboard_early_init(void) #endif } -static void speed_up_boot_cpu(void) +static void configure_spi_flash(void) { - pwm_regulator_configure(PWM_REGULATOR_LIT, 1150); + gpio_input(GPIO(1, A, 7)); /* SPI1_MISO remove pull-up */ + gpio_input(GPIO(1, B, 0)); /* SPI1_MOSI remove pull-up */ + gpio_input(GPIO(1, B, 1)); /* SPI1_CLK remove pull-up */ + gpio_input(GPIO(1, B, 2)); /* SPI1_CS remove pull-up */ - udelay(200); + rockchip_spi_init(CONFIG_BOOT_DEVICE_SPI_FLASH_BUS, 33*MHz); + rockchip_spi_set_sample_delay(CONFIG_BOOT_DEVICE_SPI_FLASH_BUS, 5); - rkclk_configure_cpu(APLL_1512_MHZ, false); + write32(&rk3399_pmugrf->spi1_rxd, IOMUX_SPI1_RX); + write32(&rk3399_pmugrf->spi1_csclktx, IOMUX_SPI1_CSCLKTX); } -void bootblock_mainboard_init(void) +static void configure_ec(void) { - speed_up_boot_cpu(); - - if (rkclk_was_watchdog_reset()) - reboot_from_watchdog(); + gpio_input(GPIO(2, C, 4)); /* SPI5_MISO remove pull-up */ + gpio_input(GPIO(2, C, 5)); /* SPI5_MOSI remove pull-up */ + gpio_input(GPIO(2, C, 6)); /* SPI5_CLK remove pull-up */ + gpio_input_pullup(GPIO(2, C, 7)); /* SPI5_CS confirm pull-up */ - /* Set pinmux and configure spi flashrom. */ - write32(&rk3399_pmugrf->spi1_rxd, IOMUX_SPI1_RX); - write32(&rk3399_pmugrf->spi1_csclktx, IOMUX_SPI1_CSCLKTX); - rockchip_spi_init(CONFIG_BOOT_DEVICE_SPI_FLASH_BUS, 33000*KHz); - rockchip_spi_set_sample_delay(CONFIG_BOOT_DEVICE_SPI_FLASH_BUS, 5); + rockchip_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, 3093750); - /* Set pinmux and configure EC SPI. */ write32(&rk3399_grf->iomux_spi5, IOMUX_SPI5); - rockchip_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, 3093750); +} +static void configure_tpm(void) +{ if (IS_ENABLED(CONFIG_GRU_HAS_TPM2)) { - /* Set pinmux and configure TPM SPI, which is not very fast. */ - write32(&rk3399_grf->iomux_spi0, IOMUX_SPI0); + gpio_input(GPIO(3, A, 4)); /* SPI0_MISO remove pull-up */ + gpio_input(GPIO(3, A, 5)); /* SPI0_MOSI remove pull-up */ + gpio_input(GPIO(3, A, 6)); /* SPI0_CLK remove pull-up */ + gpio_input_pullup(GPIO(3, A, 7)); /* SPI0_CS confirm */ + rockchip_spi_init(CONFIG_DRIVER_TPM_SPI_BUS, 1500*KHz); + + write32(&rk3399_grf->iomux_spi0, IOMUX_SPI0); } else { - /* Set pinmux and configure TPM I2C */ + gpio_input(GPIO(1, B, 7)); /* I2C0_SDA remove pull-up */ + gpio_input(GPIO(1, C, 0)); /* I2C0_SCL remove pull-up */ + + i2c_init(0, 400*KHz); + write32(&rk3399_pmugrf->iomux_i2c0_scl, IOMUX_I2C0_SCL); write32(&rk3399_pmugrf->iomux_i2c0_sda, IOMUX_I2C0_SDA); - i2c_init(0, 400*KHz); } +} + +static void speed_up_boot_cpu(void) +{ + pwm_regulator_configure(PWM_REGULATOR_LIT, 1150); + + udelay(200); + + rkclk_configure_cpu(APLL_1512_MHZ, false); +} + +void bootblock_mainboard_init(void) +{ + speed_up_boot_cpu(); + + if (rkclk_was_watchdog_reset()) + reboot_from_watchdog(); + + configure_spi_flash(); + configure_ec(); + configure_tpm(); setup_chromeos_gpios(); } |