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Diffstat (limited to 'src/mainboard/google/glados')
-rw-r--r--src/mainboard/google/glados/devicetree.cb8
-rw-r--r--src/mainboard/google/glados/ec.h6
-rw-r--r--src/mainboard/google/glados/gpio.h2
3 files changed, 13 insertions, 3 deletions
diff --git a/src/mainboard/google/glados/devicetree.cb b/src/mainboard/google/glados/devicetree.cb
index 2e1cae75a8..9bb065de17 100644
--- a/src/mainboard/google/glados/devicetree.cb
+++ b/src/mainboard/google/glados/devicetree.cb
@@ -49,6 +49,14 @@ chip soc/intel/skylake
register "PttSwitch" = "0"
register "SkipExtGfxScan" = "1"
+ # GPE configuration
+ # Note that GPE events called out in ASL code rely on this
+ # route. i.e. If this route changes then the affected GPE
+ # offset bits also need to be changed.
+ register "gpe0_dw0" = "GPP_C"
+ register "gpe0_dw1" = "GPP_D"
+ register "gpe0_dw2" = "GPP_E"
+
# Embedded Controller host command window
register "gen1_dec" = "0x00fc0801"
diff --git a/src/mainboard/google/glados/ec.h b/src/mainboard/google/glados/ec.h
index f42e4c725a..d43b57ca45 100644
--- a/src/mainboard/google/glados/ec.h
+++ b/src/mainboard/google/glados/ec.h
@@ -24,8 +24,10 @@
#include <ec/google/chromeec/ec_commands.h>
#include <soc/gpio.h>
-/* GPP_E16 is EC_SCI_L */
-#define EC_SCI_GPI 16 /* TODO: Update this */
+/* GPP_E16 is EC_SCI_L, however the EC_SCI_GPI needs to be a bit
+ * number relative to the GPE0 block. GPP_E is routed as the dword 2
+ * in the GPE0 block. Therefore, 16 + 2 * 32 = 80. */
+#define EC_SCI_GPI 80
#define EC_SMI_GPI GPP_E15
#define MAINBOARD_EC_SCI_EVENTS \
diff --git a/src/mainboard/google/glados/gpio.h b/src/mainboard/google/glados/gpio.h
index ebbee20233..c7cd5ae0c5 100644
--- a/src/mainboard/google/glados/gpio.h
+++ b/src/mainboard/google/glados/gpio.h
@@ -135,7 +135,7 @@ static const struct pad_config gpio_table[] = {
/* DDPB_HPD0 */ PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1),
/* DDPC_HPD1 */ PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
/* DDPD_HPD2 */ PAD_CFG_GPI_ACPI_SMI(GPP_E15, NONE, DEEP, YES), /* EC_SMI_L */
-/* DDPE_HPD3 */ PAD_CFG_NF(GPP_E16, NONE, DEEP, NF1),
+/* DDPE_HPD3 */ PAD_CFG_GPI_ACPI_SCI(GPP_E16, NONE, DEEP, YES), /* EC_SCI_L */
/* EDP_HPD */ PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1),
/* DDPB_CTRLCLK */ /* GPP_E18 */
/* DDPB_CTRLDATA */ /* GPP_E19 */