diff options
Diffstat (limited to 'src/mainboard/google/glados/variants/sentry/devicetree.cb')
| -rw-r--r-- | src/mainboard/google/glados/variants/sentry/devicetree.cb | 33 |
1 files changed, 25 insertions, 8 deletions
diff --git a/src/mainboard/google/glados/variants/sentry/devicetree.cb b/src/mainboard/google/glados/variants/sentry/devicetree.cb index 3e2137bb58..57586fb38e 100644 --- a/src/mainboard/google/glados/variants/sentry/devicetree.cb +++ b/src/mainboard/google/glados/variants/sentry/devicetree.cb @@ -34,13 +34,23 @@ chip soc/intel/skylake register "dptf_enable" = "1" # FSP Configuration + register "ProbelessTrace" = "0" + register "EnableLan" = "0" + register "EnableSata" = "0" + register "SataSalpSupport" = "0" + register "SataMode" = "0" + register "SataPortsEnable[0]" = "0" register "EnableAzalia" = "1" register "DspEnable" = "1" register "IoBufferOwnership" = "3" + register "EnableTraceHub" = "0" + register "SsicPortEnable" = "0" register "SmbusEnable" = "1" + register "Cio2Enable" = "0" register "ScsEmmcEnabled" = "1" register "ScsEmmcHs400Enabled" = "1" register "ScsSdCardEnabled" = "2" + register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" register "Device4Enable" = "1" register "HeciEnabled" = "0" @@ -126,14 +136,18 @@ chip soc/intel/skylake .voltage_limit = 1520, }" - # Enable Root port 1 and 5. + # Enable Root port 1 register "PcieRpEnable[0]" = "1" - register "PcieRpEnable[4]" = "1" # Enable CLKREQ# register "PcieRpClkReqSupport[0]" = "1" - register "PcieRpClkReqSupport[4]" = "1" - # RP 1 uses SRCCLKREQ1# while RP 5 uses SRCCLKREQ2# + # RP 1 uses SRCCLKREQ1# register "PcieRpClkReqNumber[0]" = "1" + + # Enable Root port 5 + register "PcieRpEnable[4]" = "1" + # Enable CLKREQ# + register "PcieRpClkReqSupport[4]" = "1" + # RP 5 uses SRCCLKREQ2# register "PcieRpClkReqNumber[4]" = "2" register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)" # Type-C Port 1 @@ -148,9 +162,6 @@ chip soc/intel/skylake register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC2)" # Type-A Port (card) register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC3)" # Type-A Port (board) - register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3" # I2C0 is 3.3V - register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V - # Must leave UART0 enabled or SD/eMMC will not work as PCI register "SerialIoDevMode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoPci, @@ -166,6 +177,12 @@ chip soc/intel/skylake [PchSerialIoIndexUart2] = PchSerialIoSkipInit, }" + # I2C0 is 3.3V + register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3" + + # I2C4 is 1.8V + register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" + # PL2 override 25W register "tdp_pl2_override" = "25" @@ -263,7 +280,7 @@ chip soc/intel/skylake device pci 1c.1 off end # PCI Express Port 2 device pci 1c.2 off end # PCI Express Port 3 device pci 1c.3 off end # PCI Express Port 4 - device pci 1c.4 on end # PCI Express Port 5 + device pci 1c.4 off end # PCI Express Port 5 device pci 1c.5 off end # PCI Express Port 6 device pci 1c.6 off end # PCI Express Port 7 device pci 1c.7 off end # PCI Express Port 8 |