diff options
Diffstat (limited to 'src/mainboard/google/glados/variants/chell/devicetree.cb')
| -rw-r--r-- | src/mainboard/google/glados/variants/chell/devicetree.cb | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/src/mainboard/google/glados/variants/chell/devicetree.cb b/src/mainboard/google/glados/variants/chell/devicetree.cb index 89f1c08b75..c0fb07c7ef 100644 --- a/src/mainboard/google/glados/variants/chell/devicetree.cb +++ b/src/mainboard/google/glados/variants/chell/devicetree.cb @@ -136,7 +136,7 @@ chip soc/intel/skylake .voltage_limit = 1520, }" - # Enable Root port 1. + # Enable Root port 1 register "PcieRpEnable[0]" = "1" # Enable CLKREQ# register "PcieRpClkReqSupport[0]" = "1" @@ -155,7 +155,6 @@ chip soc/intel/skylake register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC0)" # Type-A Port register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # SD - register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V # Must leave UART0 enabled or SD/eMMC will not work as PCI register "SerialIoDevMode" = "{ @@ -172,17 +171,21 @@ chip soc/intel/skylake [PchSerialIoIndexUart2] = PchSerialIoSkipInit, }" + # I2C4 is 1.8V + register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" + # PL2 override 15W register "tdp_pl2_override" = "15" - register "tcc_offset" = "10" # TCC of 90C - # Send an extra VR mailbox command for the supported MPS IMVP8 model register "SendVrMbxCmd" = "1" + # TCC of 90C + register "tcc_offset" = "10" + # Lock Down register "common_soc_config" = "{ - .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT + .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, }" device cpu_cluster 0 on |