diff options
Diffstat (limited to 'src/mainboard/google/gale/mainboard.c')
| -rw-r--r-- | src/mainboard/google/gale/mainboard.c | 34 |
1 files changed, 0 insertions, 34 deletions
diff --git a/src/mainboard/google/gale/mainboard.c b/src/mainboard/google/gale/mainboard.c index f0e704a4b4..f27421b87c 100644 --- a/src/mainboard/google/gale/mainboard.c +++ b/src/mainboard/google/gale/mainboard.c @@ -37,39 +37,6 @@ static void setup_usb(void) setup_usb_host1(); } -#define TPM_RESET_GPIO 19 -void ipq_setup_tpm(void) -{ - if (!IS_ENABLED(CONFIG_I2C_TPM)) - return; - - gpio_tlmm_config_set(TPM_RESET_GPIO, FUNC_SEL_GPIO, - GPIO_PULL_UP, GPIO_6MA, 1); - gpio_set(TPM_RESET_GPIO, 0); - udelay(100); - gpio_set(TPM_RESET_GPIO, 1); - - /* - * ----- Per the SLB 9615XQ1.2 spec ----- - * - * 4.7.1 Reset Timing - * - * The TPM_ACCESS_x.tpmEstablishment bit has the correct value - * and the TPM_ACCESS_x.tpmRegValidSts bit is typically set - * within 8ms after RESET# is deasserted. - * - * The TPM is ready to receive a command after less than 30 ms. - * - * -------------------------------------- - * - * I'm assuming this means "wait for 30ms" - * - * If we don't wait here, subsequent QUP I2C accesses - * to the TPM either fail or timeout. - */ - mdelay(30); -} - static void mainboard_init(device_t dev) { /* disable mmu and d-cache before setting up secure world.*/ @@ -78,7 +45,6 @@ static void mainboard_init(device_t dev) /* Setup mmu and d-cache again as non secure entries. */ setup_mmu(DRAM_INITIALIZED); setup_usb(); - ipq_setup_tpm(); if (IS_ENABLED(CONFIG_CHROMEOS)) { /* Copy WIFI calibration data into CBMEM. */ |