diff options
Diffstat (limited to 'src/mainboard/google/cyan')
| -rw-r--r-- | src/mainboard/google/cyan/devicetree.cb | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/mainboard/google/cyan/devicetree.cb b/src/mainboard/google/cyan/devicetree.cb index 5b7ef9a539..9f510bf4fe 100644 --- a/src/mainboard/google/cyan/devicetree.cb +++ b/src/mainboard/google/cyan/devicetree.cb @@ -77,8 +77,6 @@ chip soc/intel/braswell # LPE audio codec settings register "lpe_codec_clk_src" = "LPE_CLK_SRC_XTAL" # 19.2MHz clock - register "dptf_enable" = "true" - # Enable LPSS and LPE devices in ACPI mode register "lpss_acpi_mode" = "1" register "emmc_acpi_mode" = "0" @@ -97,7 +95,7 @@ chip soc/intel/braswell device pci 00.0 on end # 8086 2280 - SoC transaction router device pci 02.0 on end # 8086 22b0/22b1 - B1/C0 stepping Graphics and Display device pci 03.0 off end # 8086 22b8 - Camera and Image Processor - device pci 0b.0 off end # 8086 22dc - Signal Processing Controller + device pci 0b.0 on end # 8086 22dc - PUNIT/DPTF device pci 10.0 on end # 8086 2294 - MMC Port device pci 11.0 off end # 8086 0F15 - SDIO Port device pci 12.0 on end # 8086 0F16 - SD Port |