diff options
Diffstat (limited to 'src/mainboard/google/chell/devicetree.cb')
| -rw-r--r-- | src/mainboard/google/chell/devicetree.cb | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/src/mainboard/google/chell/devicetree.cb b/src/mainboard/google/chell/devicetree.cb index 238a5a5109..34250d3450 100644 --- a/src/mainboard/google/chell/devicetree.cb +++ b/src/mainboard/google/chell/devicetree.cb @@ -151,17 +151,17 @@ chip soc/intel/skylake # RP 1 uses SRCCLKREQ1# register "PcieRpClkReqNumber[0]" = "1" - register "usb2_ports[0]" = "USB2_PORT_LONG" # Type-C Port 1 - register "usb2_ports[1]" = "USB2_PORT_LONG" # Type-C Port 2 - register "usb2_ports[2]" = "USB2_PORT_MID" # Bluetooth - register "usb2_ports[4]" = "USB2_PORT_MID" # Type-A Port - register "usb2_ports[6]" = "USB2_PORT_FLEX" # Camera - register "usb2_ports[8]" = "USB2_PORT_MID" # SD + register "usb2_ports[0]" = "USB2_PORT_LONG(OC2)" # Type-C Port 1 + register "usb2_ports[1]" = "USB2_PORT_LONG(OC3)" # Type-C Port 2 + register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth + register "usb2_ports[4]" = "USB2_PORT_MID(OC0)" # Type-A Port + register "usb2_ports[6]" = "USB2_PORT_FLEX(OC_SKIP)" # Camera + register "usb2_ports[8]" = "USB2_PORT_MID(OC_SKIP)" # SD - register "usb3_ports[0]" = "USB3_PORT_DEFAULT" # Type-C Port 1 - register "usb3_ports[1]" = "USB3_PORT_DEFAULT" # Type-C Port 2 - register "usb3_ports[2]" = "USB3_PORT_DEFAULT" # Type-A Port - register "usb3_ports[3]" = "USB3_PORT_DEFAULT" # SD + register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC2)" # Type-C Port 1 + register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC3)" # Type-C Port 2 + register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC0)" # Type-A Port + register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # SD register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V |