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-rw-r--r--src/mainboard/google/brya/dsdt.asl3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/mainboard/google/brya/dsdt.asl b/src/mainboard/google/brya/dsdt.asl
index ea0bbf6c7b..3b50507fe6 100644
--- a/src/mainboard/google/brya/dsdt.asl
+++ b/src/mainboard/google/brya/dsdt.asl
@@ -33,9 +33,6 @@ DefinitionBlock(
/* Chipset specific sleep states */
#include <southbridge/intel/common/acpi/sleepstates.asl>
- /* Chrome OS specific */
- #include <vendorcode/google/chromeos/acpi/chromeos.asl>
-
/* Chrome OS Embedded Controller */
Scope (\_SB.PCI0.LPCB)
{