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Diffstat (limited to 'src/mainboard/google/brya/variants')
-rw-r--r--src/mainboard/google/brya/variants/quandiso/gpio.c14
-rw-r--r--src/mainboard/google/brya/variants/quandiso/overridetree.cb34
2 files changed, 27 insertions, 21 deletions
diff --git a/src/mainboard/google/brya/variants/quandiso/gpio.c b/src/mainboard/google/brya/variants/quandiso/gpio.c
index ab0a876d7b..f81650edc3 100644
--- a/src/mainboard/google/brya/variants/quandiso/gpio.c
+++ b/src/mainboard/google/brya/variants/quandiso/gpio.c
@@ -20,12 +20,12 @@ static const struct pad_config override_gpio_table[] = {
PAD_NC_LOCK(GPP_D3, NONE, LOCK_CONFIG),
/* D6 : WWAN_EN */
PAD_CFG_GPO(GPP_D6, 1, DEEP),
- /* D8 : SD_CLKREQ_ODL ==> NC */
- PAD_NC(GPP_D8, NONE),
/* D15 : EN_PP2800_WCAM_X ==> NC */
PAD_NC_LOCK(GPP_D15, NONE, LOCK_CONFIG),
/* D16 : EN_PP1800_PP1200_WCAM_X ==> NC */
PAD_NC_LOCK(GPP_D16, NONE, LOCK_CONFIG),
+ /* D17 : NC ==> SD_WAKE_N */
+ PAD_CFG_GPI_LOCK(GPP_D17, NONE, LOCK_CONFIG),
/* F6 : CNV_PA_BLANKING ==> NC */
PAD_NC(GPP_F6, NONE),
@@ -38,10 +38,6 @@ static const struct pad_config override_gpio_table[] = {
PAD_NC(GPP_H8, NONE),
/* H9 : CNV_MFUART2_TXD ==> NC */
PAD_NC(GPP_H9, NONE),
- /* H12 : SD_PERST_L ==> NC */
- PAD_NC(GPP_H12, NONE),
- /* H13 : EN_PP3300_SD_X ==> NC */
- PAD_NC(GPP_H13, NONE),
/* H15 : HDMI_SRC_SCL */
PAD_CFG_NF(GPP_H15, NONE, DEEP, NF1),
/* H17 : HDMI_SRC_SDA */
@@ -72,6 +68,10 @@ static const struct pad_config early_gpio_table[] = {
PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2),
/* H11 : UART0_TXD ==> UART_SOC_TX_DBG_RX */
PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2),
+ /* H12 : UART0_RTS# ==> SD_PERST_L */
+ PAD_CFG_GPO(GPP_H12, 0, DEEP),
+ /* H13 : UART0_CTS# ==> EN_PP3300_SD_X */
+ PAD_CFG_GPO(GPP_H13, 1, DEEP),
/* B11 : PMCALERT# ==> EN_PP3300_WLAN_X */
PAD_CFG_GPO(GPP_B11, 1, DEEP),
/* F12 : WWAN_RST_ODL */
@@ -84,6 +84,8 @@ static const struct pad_config romstage_gpio_table[] = {
PAD_CFG_GPO(GPP_C0, 1, DEEP),
/* C1 : SMBDATA ==> USI_RST_L */
PAD_CFG_GPO(GPP_C1, 0, DEEP),
+ /* H12 : UART0_RTS# ==> SD_PERST_L */
+ PAD_CFG_GPO(GPP_H12, 0, DEEP),
/* H20 : IMGCLKOUT1 ==> WLAN_PERST_L */
PAD_CFG_GPO(GPP_H20, 1, DEEP),
};
diff --git a/src/mainboard/google/brya/variants/quandiso/overridetree.cb b/src/mainboard/google/brya/variants/quandiso/overridetree.cb
index 2ff69fb923..129f186bf9 100644
--- a/src/mainboard/google/brya/variants/quandiso/overridetree.cb
+++ b/src/mainboard/google/brya/variants/quandiso/overridetree.cb
@@ -23,21 +23,11 @@ fw_config
option WFC_ABSENT 0
option WFC_MIPI_OVTI8856 1
end
- field MB_HDMI 12
- option HDMI_ABSENT 0
- option HDMI_PRESENT 1
- end
- field MB_USB 15
- option MB_1C 0
- option MB_1C_2A 1
- end
field WIFI_SAR_ID2 16 19
- option INTEL_YAVILLA_LTE 0
- option INTEL_YAVILLA_WIFI 1
- option INTEL_YAVILLY_LTE 2
- option INTEL_YAVILLY_WIFI 3
- option INTEL_YAVIJO_LTE 4
- option INTEL_YAVIJO_WIFI 5
+ option INTEL_QUANDISO_LTE 0
+ option INTEL_QUANDISO_WIFI 1
+ option INTEL_QUANDISO360_LTE 2
+ option INTEL_QUANDISO360_WIFI 3
option UNUSED 15
end
end
@@ -345,7 +335,21 @@ chip soc/intel/alderlake
device pci 00.0 on end
end
end
- device ref pcie_rp7 off end #PCIE7 no SD card
+ device ref pcie_rp7 on
+ # Enable SD Card PCIe 7 using clk 3
+ register "pch_pcie_rp[PCH_RP(7)]" = "{
+ .clk_src = 3,
+ .clk_req = 3,
+ .flags = PCIE_RP_HOTPLUG | PCIE_RP_LTR | PCIE_RP_AER,
+ }"
+ chip soc/intel/common/block/pcie/rtd3
+ register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H13)"
+ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H12)"
+ register "srcclk_pin" = "3"
+ device generic 0 on end
+ end
+ probe SD_CARD SD_PRESENT
+ end
device ref emmc on end
device ref ish on
chip drivers/intel/ish