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-rw-r--r--src/mainboard/google/beltino/onboard.h2
-rw-r--r--src/mainboard/google/beltino/romstage.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/beltino/onboard.h b/src/mainboard/google/beltino/onboard.h
index 29da766dce..2e0730912e 100644
--- a/src/mainboard/google/beltino/onboard.h
+++ b/src/mainboard/google/beltino/onboard.h
@@ -31,7 +31,7 @@
#define IT8772F_BASE 0x2e
#define IT8772F_SERIAL_DEV PNP_DEV(IT8772F_BASE, IT8772F_SP1)
#define IT8772F_GPIO_DEV PNP_DEV(IT8772F_BASE, IT8772F_GPIO)
-#define IT8772F_DUMMY_DEV PNP_DEV(IT8772F_BASE, 0)
+#define IT8772F_SUPERIO_DEV PNP_DEV(IT8772F_BASE, 0)
#ifndef __ACPI__
void lan_init(void);
diff --git a/src/mainboard/google/beltino/romstage.c b/src/mainboard/google/beltino/romstage.c
index 2ddb9b12a8..b0468f55d5 100644
--- a/src/mainboard/google/beltino/romstage.c
+++ b/src/mainboard/google/beltino/romstage.c
@@ -137,7 +137,7 @@ void mainboard_romstage_entry(unsigned long bist)
/* Early SuperIO setup */
ite_kill_watchdog(IT8772F_GPIO_DEV);
- it8772f_ac_resume_southbridge(IT8772F_DUMMY_DEV);
+ it8772f_ac_resume_southbridge(IT8772F_SUPERIO_DEV);
pch_enable_lpc();
ite_enable_serial(IT8772F_SERIAL_DEV, CONFIG_TTYS0_BASE);