diff options
Diffstat (limited to 'src/mainboard/google/auron_paine/romstage.c')
| -rw-r--r-- | src/mainboard/google/auron_paine/romstage.c | 48 |
1 files changed, 0 insertions, 48 deletions
diff --git a/src/mainboard/google/auron_paine/romstage.c b/src/mainboard/google/auron_paine/romstage.c deleted file mode 100644 index ce4af5e442..0000000000 --- a/src/mainboard/google/auron_paine/romstage.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2010 coresystems GmbH - * Copyright (C) 2014 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <cbfs.h> -#include <console/console.h> -#include <string.h> -#include <ec/google/chromeec/ec.h> -#include <soc/gpio.h> -#include <soc/pei_data.h> -#include <soc/pei_wrapper.h> -#include <soc/romstage.h> -#include <mainboard/google/auron_paine/spd/spd.h> -#include "gpio.h" - -void mainboard_romstage_entry(struct romstage_params *rp) -{ - struct pei_data pei_data; - - post_code(0x32); - - /* Ensure the EC is in the right mode for recovery */ - google_chromeec_early_init(); - - /* Initialize GPIOs */ - init_gpios(mainboard_gpio_config); - - /* Fill out PEI DATA */ - memset(&pei_data, 0, sizeof(pei_data)); - mainboard_fill_pei_data(&pei_data); - mainboard_fill_spd_data(&pei_data); - rp->pei_data = &pei_data; - - /* Call into the real romstage main with this board's attributes. */ - romstage_common(rp); -} |