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-rw-r--r--src/mainboard/gigabyte/ma785gmt/romstage.c4
-rw-r--r--src/mainboard/gigabyte/ma78gm/romstage.c4
2 files changed, 0 insertions, 8 deletions
diff --git a/src/mainboard/gigabyte/ma785gmt/romstage.c b/src/mainboard/gigabyte/ma785gmt/romstage.c
index 3286e028f4..ec3fbcd302 100644
--- a/src/mainboard/gigabyte/ma785gmt/romstage.c
+++ b/src/mainboard/gigabyte/ma785gmt/romstage.c
@@ -82,10 +82,6 @@ static int spd_read_byte(u32 device, u32 address)
#include "southbridge/amd/sb700/sb700_early_setup.c"
#include <spd.h>
-
-#define RC00 0
-#define RC01 1
-
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
diff --git a/src/mainboard/gigabyte/ma78gm/romstage.c b/src/mainboard/gigabyte/ma78gm/romstage.c
index a61be0a9ab..dcd523f057 100644
--- a/src/mainboard/gigabyte/ma78gm/romstage.c
+++ b/src/mainboard/gigabyte/ma78gm/romstage.c
@@ -86,10 +86,6 @@ static int spd_read_byte(u32 device, u32 address)
#include "southbridge/amd/sb700/sb700_early_setup.c"
#include <spd.h>
-
-#define RC00 0
-#define RC01 1
-
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{