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-rw-r--r--src/mainboard/gigabyte/ma785gm/romstage.c2
-rw-r--r--src/mainboard/gigabyte/ma785gmt/romstage.c2
-rw-r--r--src/mainboard/gigabyte/ma78gm/romstage.c2
3 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/gigabyte/ma785gm/romstage.c b/src/mainboard/gigabyte/ma785gm/romstage.c
index c5a04330d2..baf49afda8 100644
--- a/src/mainboard/gigabyte/ma785gm/romstage.c
+++ b/src/mainboard/gigabyte/ma785gm/romstage.c
@@ -142,7 +142,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
#if CONFIG_LOGICAL_CPUS
/* Core0 on each node is configured. Now setup any additional cores. */
printk(BIOS_DEBUG, "start_other_cores()\n");
- start_other_cores();
+ start_other_cores(bsp_apicid);
post_code(0x37);
wait_all_other_cores_started(bsp_apicid);
#endif
diff --git a/src/mainboard/gigabyte/ma785gmt/romstage.c b/src/mainboard/gigabyte/ma785gmt/romstage.c
index 743463da5f..b8ab282bb8 100644
--- a/src/mainboard/gigabyte/ma785gmt/romstage.c
+++ b/src/mainboard/gigabyte/ma785gmt/romstage.c
@@ -142,7 +142,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
#if CONFIG_LOGICAL_CPUS
/* Core0 on each node is configured. Now setup any additional cores. */
printk(BIOS_DEBUG, "start_other_cores()\n");
- start_other_cores();
+ start_other_cores(bsp_apicid);
post_code(0x37);
wait_all_other_cores_started(bsp_apicid);
#endif
diff --git a/src/mainboard/gigabyte/ma78gm/romstage.c b/src/mainboard/gigabyte/ma78gm/romstage.c
index aee7fbec35..43bae3ca0d 100644
--- a/src/mainboard/gigabyte/ma78gm/romstage.c
+++ b/src/mainboard/gigabyte/ma78gm/romstage.c
@@ -145,7 +145,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
#if CONFIG_LOGICAL_CPUS
/* Core0 on each node is configured. Now setup any additional cores. */
printk(BIOS_DEBUG, "start_other_cores()\n");
- start_other_cores();
+ start_other_cores(bsp_apicid);
post_code(0x37);
wait_all_other_cores_started(bsp_apicid);
#endif