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-rw-r--r--src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c b/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c
index d84eae1d93..62729a742c 100644
--- a/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c
+++ b/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c
@@ -25,6 +25,7 @@
#include <lib.h>
#include <arch/acpi.h>
#include <cbmem.h>
+#include <timestamp.h>
#include <superio/ite/it8718f/it8718f.h>
#include <superio/ite/common/ite.h>
#include <pc80/mc146818rtc.h>
@@ -165,6 +166,10 @@ void mainboard_romstage_entry(unsigned long bist)
{
int s3resume = 0, boot_mode = 0;
+
+ timestamp_init(get_initial_timestamp());
+ timestamp_add_now(TS_START_ROMSTAGE);
+
if (bist == 0)
enable_lapic();
@@ -200,7 +205,10 @@ void mainboard_romstage_entry(unsigned long bist)
#if CONFIG_DEFAULT_CONSOLE_LOGLEVEL > 8
dump_spd_registers();
#endif
+
+ timestamp_add_now(TS_BEFORE_INITRAM);
sdram_initialize(s3resume ? 2 : boot_mode, NULL);
+ timestamp_add_now(TS_AFTER_INITRAM);
/* Perform some initialization that must run before stage2 */
early_ich7_init();