diff options
Diffstat (limited to 'src/mainboard/gigabyte/ga_2761gxdk')
| -rw-r--r-- | src/mainboard/gigabyte/ga_2761gxdk/romstage.c | 20 |
1 files changed, 1 insertions, 19 deletions
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c index 4a6971be4d..70e3f96cca 100644 --- a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c +++ b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c @@ -34,37 +34,28 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include <pc80/mc146818rtc.h> - #include <console/console.h> #include <usbdebug.h> #include <spd.h> - #include <cpu/amd/model_fxx_rev.h> - #include "southbridge/sis/sis966/sis966.h" #include "southbridge/sis/sis966/sis966_early_smbus.c" #include "southbridge/sis/sis966/sis966_enable_rom.c" #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" - #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "superio/ite/it8716f/it8716f_early_serial.c" #include "superio/ite/it8716f/it8716f_early_init.c" - #include "cpu/x86/bist.h" - #include "northbridge/amd/amdk8/debug.c" - #include "cpu/x86/mtrr/earlymtrr.c" - #include "northbridge/amd/amdk8/setup_resource_map.c" +#include "southbridge/sis/sis966/sis966_early_ctrl.c" #define SERIAL_DEV PNP_DEV(0x2e, IT8716F_SP1) -#include "southbridge/sis/sis966/sis966_early_ctrl.c" - static void memreset(int controllers, const struct mem_controller *ctrl) { } @@ -84,9 +75,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" #include "lib/generic_sdram.c" - #include "resourcemap.c" - #include "cpu/amd/dualcore/dualcore.c" #define SIS966_NUM 1 @@ -104,13 +93,9 @@ static inline int spd_read_byte(unsigned device, unsigned address) RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+60, 0x00, 0x60,/* GPIO61 FANCTL1 */ #include "southbridge/sis/sis966/sis966_early_setup_ss.h" - #include "cpu/amd/car/post_cache_as_ram.c" - #include "cpu/amd/model_fxx/init_cpus.c" - #include "cpu/amd/model_fxx/fidvid.c" - #include "northbridge/amd/amdk8/early_ht.c" static void sio_setup(void) @@ -205,7 +190,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn #if CONFIG_SET_FIDVID - { msr_t msr; msr=rdmsr(0xc0010042); @@ -252,6 +236,4 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) sis_init_stage2(); post_cache_as_ram(); // bsp swtich stack to ram and copy sysinfo ram now - } - |