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path: root/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c
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Diffstat (limited to 'src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c')
-rw-r--r--src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c17
1 files changed, 12 insertions, 5 deletions
diff --git a/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c b/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c
index 7154cc9d22..27fbb2ccc7 100644
--- a/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c
+++ b/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c
@@ -25,10 +25,15 @@
void pch_enable_lpc(void)
{
- pci_write_config16(PCH_LPC_DEV, LPC_EN, KBC_LPC_EN |
- CNF1_LPC_EN | CNF2_LPC_EN | COMA_LPC_EN);
+ if (CONFIG(BOARD_GIGABYTE_GA_H61M_S2PV)) {
+ pci_write_config16(PCH_LPC_DEV, LPC_EN, KBC_LPC_EN |
+ CNF1_LPC_EN | CNF2_LPC_EN | COMA_LPC_EN);
+ pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x10);
- pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x10);
+ } else if (CONFIG(BOARD_GIGABYTE_GA_H61MA_D3V)) {
+ pci_write_config16(PCH_LPC_DEV, LPC_EN, KBC_LPC_EN |
+ CNF1_LPC_EN);
+ }
}
void mainboard_rcba_config(void)
@@ -58,8 +63,10 @@ void mainboard_early_init(int s3resume)
void mainboard_config_superio(void)
{
- /* Enable serial port */
- ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+ if (!CONFIG(NO_UART_ON_SUPERIO)) {
+ /* Enable serial port */
+ ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+ }
/* Disable SIO WDT which kicks in DualBIOS */
ite_reg_write(SUPERIO_GPIO, 0xEF, 0x7E);