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-rw-r--r--src/mainboard/getac/p470/acpi_slic.c2
-rw-r--r--src/mainboard/getac/p470/acpi_tables.c10
-rw-r--r--src/mainboard/getac/p470/chip.h2
-rw-r--r--src/mainboard/getac/p470/ec_oem.c4
-rw-r--r--src/mainboard/getac/p470/hda_verb.h2
-rw-r--r--src/mainboard/getac/p470/mainboard.c10
-rw-r--r--src/mainboard/getac/p470/mainboard_smi.c2
-rw-r--r--src/mainboard/getac/p470/romstage.c10
-rw-r--r--src/mainboard/getac/p470/rtl8168.c2
9 files changed, 22 insertions, 22 deletions
diff --git a/src/mainboard/getac/p470/acpi_slic.c b/src/mainboard/getac/p470/acpi_slic.c
index 5744efad90..b042f36c7c 100644
--- a/src/mainboard/getac/p470/acpi_slic.c
+++ b/src/mainboard/getac/p470/acpi_slic.c
@@ -1,6 +1,6 @@
/*
* This file is part of the coreboot project.
- *
+ *
* Copyright (C) 2009 coresystems GmbH
*
* This program is free software; you can redistribute it and/or
diff --git a/src/mainboard/getac/p470/acpi_tables.c b/src/mainboard/getac/p470/acpi_tables.c
index 46e7b886b1..676d6610be 100644
--- a/src/mainboard/getac/p470/acpi_tables.c
+++ b/src/mainboard/getac/p470/acpi_tables.c
@@ -1,6 +1,6 @@
/*
* This file is part of the coreboot project.
- *
+ *
* Copyright (C) 2007-2010 coresystems GmbH
*
* This program is free software; you can redistribute it and/or
@@ -87,7 +87,7 @@ static void acpi_create_intel_hpet(acpi_hpet_t * hpet)
static long acpi_create_ecdt(acpi_ecdt_t * ecdt)
{
- /* Attention: Make sure these match the values from
+ /* Attention: Make sure these match the values from
* the DSDT's ec.asl
*/
static const char ec_id[] = "\\_SB.PCI0.LPCB.EC0";
@@ -120,7 +120,7 @@ static long acpi_create_ecdt(acpi_ecdt_t * ecdt)
ecdt->ec_data.addrh = 0;
ecdt->uid = 1; // Must match _UID of the EC0 node.
-
+
ecdt->gpe_bit = 23; // SCI interrupt within GPEx_STS
strncpy((char *)ecdt->ec_id, ec_id, strlen(ec_id));
@@ -260,7 +260,7 @@ unsigned long write_acpi_tables(unsigned long start)
current += dsdt->length;
memcpy(dsdt, &AmlCode, dsdt->length);
- /* Fix up global NVS region for SMI handler. The GNVS region lives
+ /* Fix up global NVS region for SMI handler. The GNVS region lives
* in the (high) table area. The low memory map looks like this:
*
* 0x00000000 - 0x000003ff Real Mode IVT
@@ -313,7 +313,7 @@ unsigned long write_acpi_tables(unsigned long start)
current += 0x100;
ALIGN_CURRENT;
-
+
/* And tell SMI about it */
smm_setup_structures(gnvs, NULL, smi1);
diff --git a/src/mainboard/getac/p470/chip.h b/src/mainboard/getac/p470/chip.h
index db732d2876..b75c381e31 100644
--- a/src/mainboard/getac/p470/chip.h
+++ b/src/mainboard/getac/p470/chip.h
@@ -1,6 +1,6 @@
/*
* This file is part of the coreboot project.
- *
+ *
* Copyright (C) 2007-2009 coresystems GmbH
*
* This program is free software; you can redistribute it and/or
diff --git a/src/mainboard/getac/p470/ec_oem.c b/src/mainboard/getac/p470/ec_oem.c
index 30d41359cf..f742f3f72a 100644
--- a/src/mainboard/getac/p470/ec_oem.c
+++ b/src/mainboard/getac/p470/ec_oem.c
@@ -36,7 +36,7 @@ int send_ec_oem_command(u8 command)
printk(BIOS_SPEW, ".");
}
if (!timeout) {
- printk(BIOS_DEBUG, "Timeout while sending OEM command 0x%02x to EC!\n",
+ printk(BIOS_DEBUG, "Timeout while sending OEM command 0x%02x to EC!\n",
command);
// return -1;
}
@@ -124,7 +124,7 @@ int ec_oem_dump_status(void)
if (ec_sc & (1 << 1)) printk(BIOS_DEBUG, "IBF ");
if (ec_sc & (1 << 0)) printk(BIOS_DEBUG, "OBF ");
printk(BIOS_DEBUG, "\n");
-
+
return ec_sc;
}
diff --git a/src/mainboard/getac/p470/hda_verb.h b/src/mainboard/getac/p470/hda_verb.h
index 0edd0f3607..98a77c6e12 100644
--- a/src/mainboard/getac/p470/hda_verb.h
+++ b/src/mainboard/getac/p470/hda_verb.h
@@ -1,6 +1,6 @@
/*
* This file is part of the coreboot project.
- *
+ *
* Copyright (C) 2007-2009 coresystems GmbH
*
* This program is free software; you can redistribute it and/or
diff --git a/src/mainboard/getac/p470/mainboard.c b/src/mainboard/getac/p470/mainboard.c
index 8f8a39544c..b7a248dbfd 100644
--- a/src/mainboard/getac/p470/mainboard.c
+++ b/src/mainboard/getac/p470/mainboard.c
@@ -32,7 +32,7 @@
#define MAX_LCD_BRIGHTNESS 0xd8
-static void ec_enable(void)
+static void ec_enable(void)
{
u16 keymap;
/* Enable Hotkey SCI */
@@ -59,11 +59,11 @@ static void pcie_limit_power(void)
{
#if 0
// This piece of code needs further debugging as it crashes the
- // machine. It should set the slot numbers and enable power
+ // machine. It should set the slot numbers and enable power
// limitation for the PCIe slots.
device_t dev;
-
+
dev = dev_find_slot(0, PCI_DEVFN(28,0));
if (dev) pci_write_config32(dev, 0x54, 0x0010a0e0);
@@ -89,9 +89,9 @@ static void mainboard_init(device_t dev)
ec_enable();
}
-// mainboard_enable is executed as first thing after
+// mainboard_enable is executed as first thing after
// enumerate_buses(). Is there no mainboard_init()?
-static void mainboard_enable(device_t dev)
+static void mainboard_enable(device_t dev)
{
dev->ops->init = mainboard_init;
pcie_limit_power();
diff --git a/src/mainboard/getac/p470/mainboard_smi.c b/src/mainboard/getac/p470/mainboard_smi.c
index d29fe587c8..4a5a3ffbbb 100644
--- a/src/mainboard/getac/p470/mainboard_smi.c
+++ b/src/mainboard/getac/p470/mainboard_smi.c
@@ -30,7 +30,7 @@
#define MAX_LCD_BRIGHTNESS 0xd8
-/* The southbridge SMI handler checks whether gnvs has a
+/* The southbridge SMI handler checks whether gnvs has a
* valid pointer before calling the trap handler
*/
extern global_nvs_t *gnvs;
diff --git a/src/mainboard/getac/p470/romstage.c b/src/mainboard/getac/p470/romstage.c
index 6fa2620257..afad4bc820 100644
--- a/src/mainboard/getac/p470/romstage.c
+++ b/src/mainboard/getac/p470/romstage.c
@@ -1,6 +1,6 @@
/*
* This file is part of the coreboot project.
- *
+ *
* Copyright (C) 2007-2009 coresystems GmbH
*
* This program is free software; you can redistribute it and/or
@@ -320,7 +320,7 @@ void main(unsigned long bist)
/* Enable SPD ROMs and DDR-II DRAM */
enable_smbus();
-
+
#if CONFIG_DEFAULT_CONSOLE_LOGLEVEL > 8
dump_spd_registers();
#endif
@@ -330,8 +330,8 @@ void main(unsigned long bist)
/* Perform some initialization that must run before stage2 */
early_ich7_init();
- /* This should probably go away. Until now it is required
- * and mainboard specific
+ /* This should probably go away. Until now it is required
+ * and mainboard specific
*/
rcba_config();
@@ -373,7 +373,7 @@ void main(unsigned long bist)
* memory completely, but that's a wonderful clean up task for another
* day.
*/
- if (resume_backup_memory)
+ if (resume_backup_memory)
memcpy(resume_backup_memory, (void *)CONFIG_RAMBASE, HIGH_MEMORY_SAVE);
/* Magic for S3 resume */
diff --git a/src/mainboard/getac/p470/rtl8168.c b/src/mainboard/getac/p470/rtl8168.c
index f0f98d20f4..37ef674362 100644
--- a/src/mainboard/getac/p470/rtl8168.c
+++ b/src/mainboard/getac/p470/rtl8168.c
@@ -29,7 +29,7 @@
static void nic_init(struct device *dev)
{
printk(BIOS_DEBUG, "Initializing RTL8168 Gigabit Ethernet\n");
- // Nothing to do yet, but this has to be here to keep
+ // Nothing to do yet, but this has to be here to keep
// coreboot from trying to execute an option ROM.
#ifdef RTL8168_DEBUG